Re: [PATCH] libqos: pci-pc: use 32-bit write for EJ register

[Paolo Bonzini]

On 24/06/20 09:46, Thomas Huth wrote:
> On 23/06/2020 18.18, Paolo Bonzini wrote:
>> The memory region ops have min_access_size == 4 so obey it.
>>
>> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
>> ---
>>   tests/qtest/libqos/pci-pc.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/tests/qtest/libqos/pci-pc.c b/tests/qtest/libqos/pci-pc.c
>> index 0bc591d1da..3bb2eb3ba8 100644
>> --- a/tests/qtest/libqos/pci-pc.c
>> +++ b/tests/qtest/libqos/pci-pc.c
>> @@ -186,7 +186,7 @@ void qpci_unplug_acpi_device_test(QTestState *qts,
>> const char *id, uint8_t slot)
>>       g_assert(!qdict_haskey(response, "error"));
>>       qobject_unref(response);
>>   -    qtest_outb(qts, ACPI_PCIHP_ADDR + PCI_EJ_BASE, 1 << slot);
>> +    qtest_outl(qts, ACPI_PCIHP_ADDR + PCI_EJ_BASE, 1 << slot);
>>         qtest_qmp_eventwait(qts, "DEVICE_DELETED");
>>   }
> 
> I was a little bit afraid that this could cause endianess issues on big
> endian hosts, but I gave it a try on a s390x machine and it seems to
> work fine.
> 
> Tested-by: Thomas Huth <thuth@redhat.com>

Also because this is "pci-pc.c". :))  But seriously: if anything this
would fix big endian bugs, not break them.

Paolo