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Re: [PATCH v5 4/7] dwc-hsotg (dwc2) USB host controller emulation


From: Paul Zimmerman
Subject: Re: [PATCH v5 4/7] dwc-hsotg (dwc2) USB host controller emulation
Date: Tue, 19 May 2020 22:48:54 -0700



On Mon, May 18, 2020 at 8:34 AM Peter Maydell <address@hidden> wrote:
On Tue, 12 May 2020 at 07:50, Paul Zimmerman <address@hidden> wrote:
>

> +static void dwc2_reset(DeviceState *dev)
> +{
> +    DWC2State *s = DWC2_USB(dev);
> +    int i;
> +
> +    trace_usb_dwc2_reset();
> +    timer_del(s->frame_timer);
> +    qemu_bh_cancel(s->async_bh);
> +
> +    if (s->uport.dev && s->uport.dev->attached) {
> +        usb_detach(&s->uport);
> +    }
> +
> +    dwc2_bus_stop(s);


> +    dwc2_update_irq(s);

A device that uses single-phase reset shouldn't try to change
outbound IRQ lines from its reset function (because the device
on the other end might have already reset before this device,
or might reset after this device, and it doesn't necessarily
handle the irq line change correctly). If you need to
update IRQ lines in reset, you can use three-phase-reset
(see docs/devel/reset.rst).

Hi Peter,

Is there a tree somewhere that has a working example of a
three-phase reset? I did a 'git grep' on the master branch and didn't
find any code that is actually using it. I tried to implement it from
the example in reset.rst, but I'm getting a segfault on the first line in
resettable_class_set_parent_phases() that I'm having trouble figuring
out.

Thanks,
Paul

thanks
-- PMM

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