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Re: [PATCH v5 4/7] dwc-hsotg (dwc2) USB host controller emulation
From: |
Peter Maydell |
Subject: |
Re: [PATCH v5 4/7] dwc-hsotg (dwc2) USB host controller emulation |
Date: |
Wed, 20 May 2020 14:18:11 +0100 |
On Wed, 20 May 2020 at 06:49, Paul Zimmerman <address@hidden> wrote:
> Is there a tree somewhere that has a working example of a
> three-phase reset? I did a 'git grep' on the master branch and didn't
> find any code that is actually using it. I tried to implement it from
> the example in reset.rst, but I'm getting a segfault on the first line in
> resettable_class_set_parent_phases() that I'm having trouble figuring
> out.
Hmm, I thought we'd committed a change of a device to use the new
mechanism along with the actual implementation but I can't see it
now. Damien, what's the status with getting Xilinx devices to use the
3-phase reset API?
thanks
-- PMM
- Re: [PATCH v5 1/7] raspi: add BCM2835 SOC MPHI emulation, (continued)
[PATCH v5 5/7] usb: add short-packet handling to usb-storage driver, Paul Zimmerman, 2020/05/12
[PATCH v5 6/7] wire in the dwc-hsotg (dwc2) USB host controller emulation, Paul Zimmerman, 2020/05/12
[PATCH v5 7/7] raspi2 acceptance test: add test for dwc-hsotg (dwc2) USB host, Paul Zimmerman, 2020/05/12
Re: [PATCH v5 0/7] dwc-hsotg (aka dwc2) USB host controller emulation, no-reply, 2020/05/12
Re: [PATCH v5 0/7] dwc-hsotg (aka dwc2) USB host controller emulation, Gerd Hoffmann, 2020/05/14
Re: [PATCH v5 0/7] dwc-hsotg (aka dwc2) USB host controller emulation, Peter Maydell, 2020/05/18