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Re: [PATCH v4 26/40] target/arm: Update define_one_arm_cp_reg_with_opaqu
From: |
Alex Bennée |
Subject: |
Re: [PATCH v4 26/40] target/arm: Update define_one_arm_cp_reg_with_opaque for VHE |
Date: |
Wed, 04 Dec 2019 18:58:37 +0000 |
User-agent: |
mu4e 1.3.5; emacs 27.0.50 |
Richard Henderson <address@hidden> writes:
> For ARMv8.1, op1 == 5 is reserved for EL2 aliases of
> EL1 and EL0 registers.
>
> Signed-off-by: Richard Henderson <address@hidden>
> ---
> target/arm/helper.c | 5 +----
> 1 file changed, 1 insertion(+), 4 deletions(-)
>
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index 023b8963cf..1812588fa1 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -7437,13 +7437,10 @@ void define_one_arm_cp_reg_with_opaque(ARMCPU *cpu,
> mask = PL0_RW;
> break;
> case 4:
> + case 5:
> /* min_EL EL2 */
> mask = PL2_RW;
> break;
> - case 5:
> - /* unallocated encoding, so not possible */
> - assert(false);
> - break;
This change is fine - I don't think we should have asserted here anyway.
But don't we generate an unallocated exception if the CPU is v8.0?
> case 6:
> /* min_EL EL3 */
> mask = PL3_RW;
--
Alex Bennée
- Re: [PATCH v4 12/40] target/arm: Rename ARMMMUIdx*_S1E3 to ARMMMUIdx*_SE3, (continued)
[PATCH v4 16/40] target/arm: Rearrange ARMMMUIdxBit, Richard Henderson, 2019/12/02
[PATCH v4 26/40] target/arm: Update define_one_arm_cp_reg_with_opaque for VHE, Richard Henderson, 2019/12/02
- Re: [PATCH v4 26/40] target/arm: Update define_one_arm_cp_reg_with_opaque for VHE,
Alex Bennée <=
Re: [PATCH v4 26/40] target/arm: Update define_one_arm_cp_reg_with_opaque for VHE, Peter Maydell, 2019/12/06
[PATCH v4 21/40] target/arm: Update arm_sctlr for VHE, Richard Henderson, 2019/12/02
[PATCH v4 20/40] target/arm: Update arm_mmu_idx for VHE, Richard Henderson, 2019/12/02
[PATCH v4 23/40] target/arm: Update ctr_el0_access for EL2, Richard Henderson, 2019/12/02
[PATCH v4 15/40] target/arm: Expand TBFLAG_ANY.MMUIDX to 4 bits, Richard Henderson, 2019/12/02