Re: [PATCH v4 23/40] target/arm: Update ctr_el0_access for EL2

[Alex Bennée]

Richard Henderson <address@hidden> writes:

> Update to include checks against HCR_EL2.TID2.
>
> Signed-off-by: Richard Henderson <address@hidden>

Reviewed-by: Alex Bennée <address@hidden>

> ---
>  target/arm/helper.c | 26 +++++++++++++++++++++-----
>  1 file changed, 21 insertions(+), 5 deletions(-)
>
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index ffa82b5509..9ad5015d5c 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -5212,11 +5212,27 @@ static const ARMCPRegInfo el3_cp_reginfo[] = {
>  static CPAccessResult ctr_el0_access(CPUARMState *env, const ARMCPRegInfo 
> *ri,
>                                       bool isread)
>  {
> -    /* Only accessible in EL0 if SCTLR.UCT is set (and only in AArch64,
> -     * but the AArch32 CTR has its own reginfo struct)
> -     */
> -    if (arm_current_el(env) == 0 && !(env->cp15.sctlr_el[1] & SCTLR_UCT)) {
> -        return CP_ACCESS_TRAP;
> +    int cur_el = arm_current_el(env);
> +
> +    if (cur_el < 2) {
> +        uint64_t hcr = arm_hcr_el2_eff(env);
> +
> +        if (cur_el == 0) {
> +            if ((hcr & (HCR_E2H | HCR_TGE)) == (HCR_E2H | HCR_TGE)) {
> +                if (!(env->cp15.sctlr_el[2] & SCTLR_UCT)) {
> +                    return CP_ACCESS_TRAP_EL2;
> +                }
> +            } else {
> +                if (!(env->cp15.sctlr_el[1] & SCTLR_UCT)) {
> +                    return CP_ACCESS_TRAP;
> +                }
> +                if (hcr & HCR_TID2) {
> +                    return CP_ACCESS_TRAP_EL2;
> +                }
> +            }
> +        } else if (hcr & HCR_TID2) {
> +            return CP_ACCESS_TRAP_EL2;
> +        }
>      }
>      return CP_ACCESS_OK;
>  }


-- 
Alex Bennée