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[Qemu-devel] [PATCH v17 24/24] target/rx: Remove suffix in cpu class.
From: |
Yoshinori Sato |
Subject: |
[Qemu-devel] [PATCH v17 24/24] target/rx: Remove suffix in cpu class. |
Date: |
Fri, 7 Jun 2019 18:11:16 +0900 |
New CPUs should not be suffixed like other devices.
Signed-off-by: Yoshinori Sato <address@hidden>
---
include/hw/rx/rx62n.h | 2 +-
target/rx/cpu.h | 3 +--
target/rx/cpu.c | 8 ++------
3 files changed, 4 insertions(+), 9 deletions(-)
diff --git a/include/hw/rx/rx62n.h b/include/hw/rx/rx62n.h
index 5f6912fe46..e57c5ec091 100644
--- a/include/hw/rx/rx62n.h
+++ b/include/hw/rx/rx62n.h
@@ -30,7 +30,7 @@
#include "target/rx/cpu.h"
#include "qemu/units.h"
-#define TYPE_RX62N "rx62n"
+#define TYPE_RX62N "rx62n-mcu"
#define TYPE_RX62N_CPU RX_CPU_TYPE_NAME(TYPE_RX62N)
#define RX62N(obj) OBJECT_CHECK(RX62NState, (obj), TYPE_RX62N)
diff --git a/target/rx/cpu.h b/target/rx/cpu.h
index a0b6975963..080ea604a3 100644
--- a/target/rx/cpu.h
+++ b/target/rx/cpu.h
@@ -164,8 +164,7 @@ static inline RXCPU *rx_env_get_cpu(CPURXState *env)
#define ENV_OFFSET offsetof(RXCPU, env)
-#define RX_CPU_TYPE_SUFFIX "-" TYPE_RX_CPU
-#define RX_CPU_TYPE_NAME(model) model RX_CPU_TYPE_SUFFIX
+#define RX_CPU_TYPE_NAME(model) model
#define CPU_RESOLVING_TYPE TYPE_RX_CPU
extern const char rx_crname[][6];
diff --git a/target/rx/cpu.c b/target/rx/cpu.c
index 41fe1de4bb..d8c662b231 100644
--- a/target/rx/cpu.c
+++ b/target/rx/cpu.c
@@ -72,9 +72,8 @@ static void rx_cpu_reset(CPUState *s)
static void rx_cpu_list_entry(gpointer data, gpointer user_data)
{
const char *typename = object_class_get_name(OBJECT_CLASS(data));
- int len = strlen(typename) - strlen(RX_CPU_TYPE_SUFFIX);
- qemu_printf(" %.*s\n", len, typename);
+ qemu_printf(" %s\n", typename);
}
void rx_cpu_list(void)
@@ -89,11 +88,8 @@ void rx_cpu_list(void)
static ObjectClass *rx_cpu_class_by_name(const char *cpu_model)
{
ObjectClass *oc;
- char *typename;
- typename = g_strdup_printf(RX_CPU_TYPE_NAME("%s"), cpu_model);
- oc = object_class_by_name(typename);
- g_free(typename);
+ oc = object_class_by_name(cpu_model);
if (oc == NULL ||
object_class_is_abstract(oc) ||
--
2.11.0
- [Qemu-devel] [PATCH v17 00/24] Add RX archtecture support, Yoshinori Sato, 2019/06/07
- [Qemu-devel] [PATCH v17 22/24] target/rx: Collect all bytes during disassembly, Yoshinori Sato, 2019/06/07
- [Qemu-devel] [PATCH v17 07/24] hw/char: RX62N serial communication interface (SCI), Yoshinori Sato, 2019/06/07
- [Qemu-devel] [PATCH v17 12/24] target/rx: Add RX to SysEmuTarget, Yoshinori Sato, 2019/06/07
- [Qemu-devel] [PATCH v17 11/24] target/rx: Convert to CPUClass::tlb_fill, Yoshinori Sato, 2019/06/07
- [Qemu-devel] [PATCH v17 10/24] hw/registerfields.h: Add 8bit and 16bit register macros, Yoshinori Sato, 2019/06/07
- [Qemu-devel] [PATCH v17 14/24] tests: Add rx to machine-none-test.c, Yoshinori Sato, 2019/06/07
- [Qemu-devel] [PATCH v17 24/24] target/rx: Remove suffix in cpu class.,
Yoshinori Sato <=
- [Qemu-devel] [PATCH v17 18/24] target/rx: Disassemble rx_index_addr into a string, Yoshinori Sato, 2019/06/07
- [Qemu-devel] [PATCH v17 08/24] hw/rx: RX Target hardware definition, Yoshinori Sato, 2019/06/07
- [Qemu-devel] [PATCH v17 04/24] target/rx: RX disassembler, Yoshinori Sato, 2019/06/07
- [Qemu-devel] [PATCH v17 23/24] target/rx: Dump bytes for each insn during disassembly, Yoshinori Sato, 2019/06/07
- [Qemu-devel] [PATCH v17 05/24] hw/intc: RX62N interrupt controller (ICUa), Yoshinori Sato, 2019/06/07
- [Qemu-devel] [PATCH v17 19/24] target/rx: Replace operand with prt_ldmi in disassembler, Yoshinori Sato, 2019/06/07
- [Qemu-devel] [PATCH v17 13/24] target/rx: Fix cpu types and names, Yoshinori Sato, 2019/06/07