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Re: [Qemu-devel] i386: EFER vs 32-bit CPU
From: |
Peter Xu |
Subject: |
Re: [Qemu-devel] i386: EFER vs 32-bit CPU |
Date: |
Thu, 30 May 2019 08:52:43 +0800 |
User-agent: |
Mutt/1.10.1 (2018-07-13) |
On Wed, May 29, 2019 at 02:26:39PM +0300, Pavel Dovgalyuk wrote:
> Hello!
>
>
>
> I found this while debugging the inconsistent saved/restored state of the
> virtual machine.
>
>
>
> i386 (32 bit) emulation uses this register (in wrmsr and in MMU fault
> processing).
Sorry if this question is elementary, but... why would a 32bit guest
use IA32_EFER? From SDM I only see 4 bits defined in this MSR (SCE,
LME, LMA, NXE) but is there any of them that should be set in a 32bit
guest?
Regards,
--
Peter Xu
Re: [Qemu-devel] i386: EFER vs 32-bit CPU,
Peter Xu <=
Re: [Qemu-devel] i386: EFER vs 32-bit CPU, TeLeMan, 2019/05/30