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From: | Richard Henderson |
Subject: | Re: [Qemu-devel] [PATCH 06/26] target/arm: Decode FP instructions for M profile |
Date: | Tue, 23 Apr 2019 11:37:27 -0700 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 |
On 4/16/19 5:57 AM, Peter Maydell wrote: > Correct the decode of the M-profile "coprocessor and > floating-point instructions" space: > * op0 == 0b11 is always unallocated > * if the CPU has an FPU then all insns with op1 == 0b101 > are floating point and go to disas_vfp_insn() > > For the moment we leave VLLDM and VLSTM as NOPs; in > a later commit we will fill in the proper implementation > for the case where an FPU is present. > > Signed-off-by: Peter Maydell <address@hidden> > --- > target/arm/translate.c | 26 ++++++++++++++++++++++---- > 1 file changed, 22 insertions(+), 4 deletions(-) Reviewed-by: Richard Henderson <address@hidden> r~
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