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Re: [Qemu-devel] [RFC for-4.1 25/25] target/ppc: Style fixes for transla
From: |
Cédric Le Goater |
Subject: |
Re: [Qemu-devel] [RFC for-4.1 25/25] target/ppc: Style fixes for translate/spe-impl.inc.c |
Date: |
Mon, 25 Mar 2019 08:48:45 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.4.0 |
On 3/22/19 1:15 AM, David Gibson wrote:
> Signed-off-by: David Gibson <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Thanks,
C.
> ---
> target/ppc/translate/spe-impl.inc.c | 14 +++++++++-----
> 1 file changed, 9 insertions(+), 5 deletions(-)
>
> diff --git a/target/ppc/translate/spe-impl.inc.c
> b/target/ppc/translate/spe-impl.inc.c
> index 8c1c16c63e..7ab0a29b5f 100644
> --- a/target/ppc/translate/spe-impl.inc.c
> +++ b/target/ppc/translate/spe-impl.inc.c
> @@ -18,7 +18,8 @@ static inline void gen_evmra(DisasContext *ctx)
> TCGv_i64 tmp = tcg_temp_new_i64();
>
> /* tmp := rA_lo + rA_hi << 32 */
> - tcg_gen_concat_tl_i64(tmp, cpu_gpr[rA(ctx->opcode)],
> cpu_gprh[rA(ctx->opcode)]);
> + tcg_gen_concat_tl_i64(tmp, cpu_gpr[rA(ctx->opcode)],
> + cpu_gprh[rA(ctx->opcode)]);
>
> /* spe_acc := tmp */
> tcg_gen_st_i64(tmp, cpu_env, offsetof(CPUPPCState, spe_acc));
> @@ -780,7 +781,7 @@ static inline void gen_op_evstwwo(DisasContext *ctx, TCGv
> addr)
> }
>
> #define GEN_SPEOP_LDST(name, opc2, sh)
> \
> -static void glue(gen_, name)(DisasContext *ctx)
> \
> +static void glue(gen_, name)(DisasContext *ctx)
> \
> {
> \
> TCGv t0;
> \
> if (unlikely(!ctx->spe_enabled)) {
> \
> @@ -1089,7 +1090,8 @@ static inline void gen_efsabs(DisasContext *ctx)
> gen_exception(ctx, POWERPC_EXCP_SPEU);
> return;
> }
> - tcg_gen_andi_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)],
> (target_long)~0x80000000LL);
> + tcg_gen_andi_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)],
> + (target_long)~0x80000000LL);
> }
> static inline void gen_efsnabs(DisasContext *ctx)
> {
> @@ -1097,7 +1099,8 @@ static inline void gen_efsnabs(DisasContext *ctx)
> gen_exception(ctx, POWERPC_EXCP_SPEU);
> return;
> }
> - tcg_gen_ori_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)],
> 0x80000000);
> + tcg_gen_ori_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)],
> + 0x80000000);
> }
> static inline void gen_efsneg(DisasContext *ctx)
> {
> @@ -1105,7 +1108,8 @@ static inline void gen_efsneg(DisasContext *ctx)
> gen_exception(ctx, POWERPC_EXCP_SPEU);
> return;
> }
> - tcg_gen_xori_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)],
> 0x80000000);
> + tcg_gen_xori_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)],
> + 0x80000000);
> }
>
> /* Conversion */
>
- Re: [Qemu-devel] [RFC for-4.1 12/25] target/ppc: Style fixes for machine.c, (continued)
- [Qemu-devel] [RFC for-4.1 04/25] target/ppc: Style fixes for cpu.[ch], David Gibson, 2019/03/21
- [Qemu-devel] [RFC for-4.1 02/25] hw/ppc/prep: Drop useless inclusion of "hw/input/i8042.h", David Gibson, 2019/03/21
- [Qemu-devel] [RFC for-4.1 06/25] target/ppc: Style fixes for fpu_helper.c, David Gibson, 2019/03/21
- [Qemu-devel] [RFC for-4.1 03/25] target/ppc: Style fixes for ppc-models.[ch], David Gibson, 2019/03/21
- [Qemu-devel] [RFC for-4.1 01/25] spapr: Support NVIDIA V100 GPU with NVLink2, David Gibson, 2019/03/21
- [Qemu-devel] [RFC for-4.1 25/25] target/ppc: Style fixes for translate/spe-impl.inc.c, David Gibson, 2019/03/21
- Re: [Qemu-devel] [RFC for-4.1 25/25] target/ppc: Style fixes for translate/spe-impl.inc.c,
Cédric Le Goater <=
- [Qemu-devel] [RFC for-4.1 20/25] target/ppc: Style fixes for translate_init.inc.c, David Gibson, 2019/03/21
- Re: [Qemu-devel] [Qemu-ppc] [RFC for-4.1 20/25] target/ppc: Style fixes for translate_init.inc.c, Greg Kurz, 2019/03/25
- [Qemu-devel] [RFC for-4.1 17/25] target/ppc: Style fixes for mmu-hash64.[ch], David Gibson, 2019/03/21
- [Qemu-devel] [RFC for-4.1 21/25] target/ppc: Style fixes for translate.c, David Gibson, 2019/03/21