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[Qemu-devel] [RFC v3 11/24] riscv: tcg-target: Add the relocation functi
From: |
Alistair Francis |
Subject: |
[Qemu-devel] [RFC v3 11/24] riscv: tcg-target: Add the relocation functions |
Date: |
Sat, 8 Dec 2018 00:47:54 +0000 |
Signed-off-by: Alistair Francis <address@hidden>
Signed-off-by: Michael Clark <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/riscv/tcg-target.inc.c | 75 ++++++++++++++++++++++++++++++++++++++
1 file changed, 75 insertions(+)
diff --git a/tcg/riscv/tcg-target.inc.c b/tcg/riscv/tcg-target.inc.c
index cfcab9c716..05e85805d2 100644
--- a/tcg/riscv/tcg-target.inc.c
+++ b/tcg/riscv/tcg-target.inc.c
@@ -422,3 +422,78 @@ static void tcg_out_nop_fill(tcg_insn_unit *p, int count)
p[i] = encode_i(OPC_ADDI, TCG_REG_ZERO, TCG_REG_ZERO, 0);
}
}
+
+/*
+ * Relocations
+ */
+
+static void reloc_sbimm12(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
+{
+ intptr_t offset = (intptr_t)target - (intptr_t)code_ptr;
+ tcg_debug_assert(offset == sextreg(offset, 1, 12) << 1);
+
+ code_ptr[0] |= encode_sbimm12(offset);
+}
+
+static void reloc_jimm20(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
+{
+ intptr_t offset = (intptr_t)target - (intptr_t)code_ptr;
+ tcg_debug_assert(offset == sextreg(offset, 1, 20) << 1);
+
+ code_ptr[0] |= encode_ujimm20(offset);
+}
+
+static void reloc_call(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
+{
+ intptr_t offset = (intptr_t)target - (intptr_t)code_ptr;
+ int32_t lo = sextreg(offset, 0, 12);
+ int32_t hi = offset - lo;
+
+ tcg_debug_assert(offset == hi + lo);
+
+ code_ptr[0] |= encode_uimm20(hi);
+ code_ptr[1] |= encode_imm12(lo);
+}
+
+static void patch_reloc(tcg_insn_unit *code_ptr, int type,
+ intptr_t value, intptr_t addend)
+{
+ uint32_t insn = *code_ptr;
+ intptr_t diff;
+ bool short_jmp;
+
+ tcg_debug_assert(addend == 0);
+
+ switch (type) {
+ case R_RISCV_BRANCH:
+ diff = value - (uintptr_t)code_ptr;
+ short_jmp = diff == sextreg(diff, 0, 12);
+ if (short_jmp) {
+ reloc_sbimm12(code_ptr, (tcg_insn_unit *)value);
+ } else {
+ /* Invert the condition */
+ insn = insn ^ (1 << 12);
+ /* Clear the offset */
+ insn &= 0x01fff07f;
+ /* Set the offset to the PC + 8 */
+ insn |= encode_sbimm12(8);
+
+ /* Move forward */
+ code_ptr[0] = insn;
+
+ /* Overwrite the NOP with jal x0,value */
+ diff = value - (uintptr_t)(code_ptr + 1);
+ insn = encode_uj(OPC_JAL, TCG_REG_ZERO, diff);
+ code_ptr[1] = insn;
+ }
+ break;
+ case R_RISCV_JAL:
+ reloc_jimm20(code_ptr, (tcg_insn_unit *)value);
+ break;
+ case R_RISCV_CALL:
+ reloc_call(code_ptr, (tcg_insn_unit *)value);
+ break;
+ default:
+ tcg_abort();
+ }
+}
--
2.19.1
- [Qemu-devel] [RFC v3 04/24] linux-user: riscv: Fix compile failure on riscv32 hosts, (continued)
- [Qemu-devel] [RFC v3 04/24] linux-user: riscv: Fix compile failure on riscv32 hosts, Alistair Francis, 2018/12/07
- [Qemu-devel] [RFC v3 05/24] exec: Add RISC-V GCC poison macro, Alistair Francis, 2018/12/07
- [Qemu-devel] [RFC v3 06/24] riscv: Add the tcg-target header file, Alistair Francis, 2018/12/07
- [Qemu-devel] [RFC v3 07/24] riscv: Add the tcg target registers, Alistair Francis, 2018/12/07
- [Qemu-devel] [RFC v3 08/24] riscv: tcg-target: Add support for the constraints, Alistair Francis, 2018/12/07
- [Qemu-devel] [RFC v3 09/24] riscv: tcg-target: Add the immediate encoders, Alistair Francis, 2018/12/07
- [Qemu-devel] [RFC v3 10/24] riscv: tcg-target: Add the instruction emitters, Alistair Francis, 2018/12/07
- [Qemu-devel] [RFC v3 11/24] riscv: tcg-target: Add the relocation functions,
Alistair Francis <=
- [Qemu-devel] [RFC v3 12/24] riscv: tcg-target: Add the mov and movi instruction, Alistair Francis, 2018/12/07
- [Qemu-devel] [RFC v3 13/24] riscv: tcg-target: Add the extract instructions, Alistair Francis, 2018/12/07
- [Qemu-devel] [RFC v3 14/24] riscv: tcg-target: Add the out load and store instructions, Alistair Francis, 2018/12/07
- [Qemu-devel] [RFC v3 15/24] riscv: tcg-target: Add the add2 and sub2 instructions, Alistair Francis, 2018/12/07
- [Qemu-devel] [RFC v3 16/24] riscv: tcg-target: Add branch and jump instructions, Alistair Francis, 2018/12/07
- [Qemu-devel] [RFC v3 17/24] riscv: tcg-target: Add slowpath load and store instructions, Alistair Francis, 2018/12/07
- [Qemu-devel] [RFC v3 18/24] riscv: tcg-target: Add direct load and store instructions, Alistair Francis, 2018/12/07