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[Qemu-devel] [for-4.0 PATCH v3 9/9] pcie: Fast PCIe root ports for new m
From: |
Alex Williamson |
Subject: |
[Qemu-devel] [for-4.0 PATCH v3 9/9] pcie: Fast PCIe root ports for new machines |
Date: |
Tue, 04 Dec 2018 09:27:28 -0700 |
User-agent: |
StGit/0.19-dirty |
Change the default speed and width for new machine types to the
fastest and widest currently supported. This should be compatible to
the PCIe 4.0 spec. Pre-QEMU-4.0 machine types remain at 2.5GT/s, x1
width.
Cc: Michael S. Tsirkin <address@hidden>
Cc: Marcel Apfelbaum <address@hidden>
Signed-off-by: Alex Williamson <address@hidden>
---
hw/pci-bridge/gen_pcie_root_port.c | 4 ++--
include/hw/compat.h | 10 +++++++++-
2 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/hw/pci-bridge/gen_pcie_root_port.c
b/hw/pci-bridge/gen_pcie_root_port.c
index ca5418a89dd2..9766edb44596 100644
--- a/hw/pci-bridge/gen_pcie_root_port.c
+++ b/hw/pci-bridge/gen_pcie_root_port.c
@@ -125,9 +125,9 @@ static Property gen_rp_props[] = {
DEFINE_PROP_SIZE("pref64-reserve", GenPCIERootPort,
res_reserve.mem_pref_64, -1),
DEFINE_PROP_PCIE_LINK_SPEED("x-speed", PCIESlot,
- speed, PCIE_LINK_SPEED_2_5),
+ speed, PCIE_LINK_SPEED_16),
DEFINE_PROP_PCIE_LINK_WIDTH("x-width", PCIESlot,
- width, PCIE_LINK_WIDTH_1),
+ width, PCIE_LINK_WIDTH_32),
DEFINE_PROP_END_OF_LIST()
};
diff --git a/include/hw/compat.h b/include/hw/compat.h
index 70958328fe7a..702cc62277db 100644
--- a/include/hw/compat.h
+++ b/include/hw/compat.h
@@ -2,7 +2,15 @@
#define HW_COMPAT_H
#define HW_COMPAT_3_1 \
- /* empty */
+ {\
+ .driver = "pcie-root-port",\
+ .property = "speed",\
+ .value = "2_5",\
+ },{\
+ .driver = "pcie-root-port",\
+ .property = "width",\
+ .value = "1",\
+ },
#define HW_COMPAT_3_0 \
/* empty */