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Re: [Qemu-devel] [PATCH v5 26/76] target/mips: Add emulation of some com
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH v5 26/76] target/mips: Add emulation of some common nanoMIPS 32-bit instructions |
Date: |
Tue, 31 Jul 2018 09:49:10 -0400 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 |
On 07/30/2018 12:11 PM, Aleksandar Markovic wrote:
> + case NM_ADDIUPC:
> + if (rt != 0) {
> + int32_t offset = sextract32(ctx->opcode, 0, 1) << 21 |
> + extract32(ctx->opcode, 1, 20) << 1;
> + target_long addr = addr_add(ctx, ctx->base.pc_next + 4, offset);
> + tcg_gen_movi_tl(cpu_gpr[rt], (int32_t)addr);
addr_add has already done any required sign-extend.
Including an extra one is wrong for nanomips64.
> + case NM_SEQI:
> + {
> + TCGv t0 = tcg_temp_new();
> + TCGv t1 = tcg_temp_new();
> + TCGv t2 = tcg_temp_local_new();
> +
> + gen_load_gpr(t0, rs);
> + tcg_gen_movi_tl(t1, extract32(ctx->opcode, 0, 12));
> + tcg_gen_setcond_tl(TCG_COND_EQ, t2, t0, t1);
> + gen_store_gpr(t2, rt);
> +
> + tcg_temp_free(t0);
> + tcg_temp_free(t1);
> + tcg_temp_free(t2);
> + }
> + break;
You only need one temporary.
TCGv t0 = tcg_temp_new();
int imm = extract32(ctx->opcode, 0, 12);
gen_load_gpr(t0, rs);
tcg_gen_setcondi_tl(TCG_COND_EQ, t0, t0, imm);
gen_store_gpr(t0, rt);
tcg_temp_free(t0);
Do not use tcg_temp_local_new unless you really need it in order to cross a
basic block boundary (branch or label).
> + } else if (rt == 0 && shift == 6) {
> + /* SYNC */
> + check_insn(ctx, ISA_MIPS2);
Cut and paste error from elsewhere?
Why would you need this ISA check?
r~
- Re: [Qemu-devel] [PATCH v5 21/76] target/mips: Add emulation of nanoMIPS 16-bit shift instructions, (continued)
- [Qemu-devel] [PATCH v5 22/76] target/mips: Add emulation of nanoMIPS 16-bit misc instructions, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 23/76] target/mips: Add emulation of nanoMIPS 16-bit load and store instructions, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 24/76] target/mips: Add emulation of nanoMIPS 16-bit logic instructions, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 25/76] target/mips: Add emulation of nanoMIPS 16-bit save and restore instructions, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 26/76] target/mips: Add emulation of some common nanoMIPS 32-bit instructions, Aleksandar Markovic, 2018/07/30
- Re: [Qemu-devel] [PATCH v5 26/76] target/mips: Add emulation of some common nanoMIPS 32-bit instructions,
Richard Henderson <=
- [Qemu-devel] [PATCH v5 27/76] target/mips: Add emulation of nanoMIPS instructions MOVE.P and MOVE.PREV, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 28/76] target/mips: Add emulation of nanoMIPS 48-bit instructions, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 29/76] target/mips: Add emulation of nanoMIPS FP instructions, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 30/76] target/mips: Add emulation of misc nanoMIPS instructions (pool32a0), Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 31/76] target/mips: Add emulation of misc nanoMIPS instructions (pool32axf), Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 32/76] target/mips: Add emulation of misc nanoMIPS instructions (p_lsx), Aleksandar Markovic, 2018/07/30