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[Qemu-devel] [PATCH v5 24/76] target/mips: Add emulation of nanoMIPS 16-
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PATCH v5 24/76] target/mips: Add emulation of nanoMIPS 16-bit logic instructions |
Date: |
Mon, 30 Jul 2018 18:11:57 +0200 |
From: Yongbok Kim <address@hidden>
Add emulation of NOT16, AND16, XOR16, OR16 instructions.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>
---
target/mips/translate.c | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index fd06701..2ea90f0 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -16520,6 +16520,27 @@ static inline int decode_gpr_gpr4_zero(int r)
#define NANOMIPS_EXTRACT_RS5(op) (op & 0x1f)
+static void gen_pool16c_nanomips_insn(DisasContext *ctx)
+{
+ int rt = decode_gpr_gpr3(NANOMIPS_EXTRACT_RD(ctx->opcode));
+ int rs = decode_gpr_gpr3(NANOMIPS_EXTRACT_RS(ctx->opcode));
+
+ switch (extract32(ctx->opcode, 2, 2)) {
+ case NM_NOT16:
+ gen_logic(ctx, OPC_NOR, rt, rs, 0);
+ break;
+ case NM_AND16:
+ gen_logic(ctx, OPC_AND, rt, rt, rs);
+ break;
+ case NM_XOR16:
+ gen_logic(ctx, OPC_XOR, rt, rt, rs);
+ break;
+ case NM_OR16:
+ gen_logic(ctx, OPC_OR, rt, rt, rs);
+ break;
+ }
+}
+
static int decode_nanomips_opc(CPUMIPSState *env, DisasContext *ctx)
{
uint32_t op;
@@ -16594,6 +16615,7 @@ static int decode_nanomips_opc(CPUMIPSState *env,
DisasContext *ctx)
case NM_P16C:
switch (ctx->opcode & 1) {
case NM_POOL16C_0:
+ gen_pool16c_nanomips_insn(ctx);
break;
case NM_LWXS16:
gen_ldxs(ctx, rt, rs, rd);
@@ -16668,6 +16690,12 @@ static int decode_nanomips_opc(CPUMIPSState *env,
DisasContext *ctx)
}
break;
case NM_ANDI16:
+ {
+ uint32_t u = extract32(ctx->opcode, 0, 4);
+ u = (u == 12) ? 0xff :
+ (u == 13) ? 0xffff : u;
+ gen_logic_imm(ctx, OPC_ANDI, rt, rs, u);
+ }
break;
case NM_P16_LB:
rd = extract32(ctx->opcode, 0, 2);
--
2.7.4
- [Qemu-devel] [PATCH v5 19/76] target/mips: Add emulation of nanoMIPS 16-bit arithmetic instructions, (continued)
- [Qemu-devel] [PATCH v5 19/76] target/mips: Add emulation of nanoMIPS 16-bit arithmetic instructions, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 20/76] target/mips: Add emulation of nanoMIPS 16-bit branch instructions, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 21/76] target/mips: Add emulation of nanoMIPS 16-bit shift instructions, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 22/76] target/mips: Add emulation of nanoMIPS 16-bit misc instructions, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 23/76] target/mips: Add emulation of nanoMIPS 16-bit load and store instructions, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 24/76] target/mips: Add emulation of nanoMIPS 16-bit logic instructions,
Aleksandar Markovic <=
- [Qemu-devel] [PATCH v5 25/76] target/mips: Add emulation of nanoMIPS 16-bit save and restore instructions, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 26/76] target/mips: Add emulation of some common nanoMIPS 32-bit instructions, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 27/76] target/mips: Add emulation of nanoMIPS instructions MOVE.P and MOVE.PREV, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 28/76] target/mips: Add emulation of nanoMIPS 48-bit instructions, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 29/76] target/mips: Add emulation of nanoMIPS FP instructions, Aleksandar Markovic, 2018/07/30