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[Qemu-devel] [PULL v2 24/25] target/openrisc: Fix delay slot exception f
From: |
Stafford Horne |
Subject: |
[Qemu-devel] [PULL v2 24/25] target/openrisc: Fix delay slot exception flag to match spec |
Date: |
Tue, 3 Jul 2018 00:10:22 +0900 |
The delay slot exception flag is only set on the SR register during
exception. Previously it was being set on both the ESR and SR this
caused QEMU to differ from the spec. The was apparent as the linux
kernel had a bug where it could boot on QEMU but not on real hardware.
The fixed logic now matches hardware.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Stafford Horne <address@hidden>
---
target/openrisc/interrupt.c | 19 ++++++++++++-------
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/target/openrisc/interrupt.c b/target/openrisc/interrupt.c
index 138ad17f00..bbae956361 100644
--- a/target/openrisc/interrupt.c
+++ b/target/openrisc/interrupt.c
@@ -35,13 +35,6 @@ void openrisc_cpu_do_interrupt(CPUState *cs)
int exception = cs->exception_index;
env->epcr = env->pc;
- if (env->dflag) {
- env->dflag = 0;
- env->sr |= SR_DSX;
- env->epcr -= 4;
- } else {
- env->sr &= ~SR_DSX;
- }
if (exception == EXCP_SYSCALL) {
env->epcr += 4;
}
@@ -51,7 +44,10 @@ void openrisc_cpu_do_interrupt(CPUState *cs)
env->eear = env->pc;
}
+ /* During exceptions esr is populared with the pre-exception sr. */
env->esr = cpu_get_sr(env);
+ /* In parallel sr is updated to disable mmu, interrupts, timers and
+ set the delay slot exception flag. */
env->sr &= ~SR_DME;
env->sr &= ~SR_IME;
env->sr |= SR_SM;
@@ -61,6 +57,15 @@ void openrisc_cpu_do_interrupt(CPUState *cs)
env->pmr &= ~PMR_SME;
env->lock_addr = -1;
+ /* Set/clear dsx to indicate if we are in a delay slot exception. */
+ if (env->dflag) {
+ env->dflag = 0;
+ env->sr |= SR_DSX;
+ env->epcr -= 4;
+ } else {
+ env->sr &= ~SR_DSX;
+ }
+
if (exception > 0 && exception < EXCP_NR) {
static const char * const int_name[EXCP_NR] = {
[EXCP_RESET] = "RESET",
--
2.17.0
- [Qemu-devel] [PULL v2 21/25] target/openrisc: Add support in scripts/qemu-binfmt-conf.sh, (continued)
- [Qemu-devel] [PULL v2 21/25] target/openrisc: Add support in scripts/qemu-binfmt-conf.sh, Stafford Horne, 2018/07/02
- [Qemu-devel] [PULL v2 22/25] linux-user: Implement signals for openrisc, Stafford Horne, 2018/07/02
- Re: [Qemu-devel] [PULL v2 22/25] linux-user: Implement signals for openrisc, Philippe Mathieu-Daudé, 2018/07/03
- Re: [Qemu-devel] [PULL v2 22/25] linux-user: Implement signals for openrisc, Stafford Horne, 2018/07/03
- Re: [Qemu-devel] [PULL v2 22/25] linux-user: Implement signals for openrisc, Richard Henderson, 2018/07/04
- Re: [Qemu-devel] [PULL v2 22/25] linux-user: Implement signals for openrisc, Eric Blake, 2018/07/06
- Re: [Qemu-devel] [PULL v2 22/25] linux-user: Implement signals for openrisc, Stafford Horne, 2018/07/06
- Re: [Qemu-devel] [PULL v2 22/25] linux-user: Implement signals for openrisc, Laurent Vivier, 2018/07/07
- Re: [Qemu-devel] [PULL v2 22/25] linux-user: Implement signals for openrisc, Alex Bennée, 2018/07/07
[Qemu-devel] [PULL v2 25/25] target/openrisc: Fix writes to interrupt mask register, Stafford Horne, 2018/07/02
[Qemu-devel] [PULL v2 24/25] target/openrisc: Fix delay slot exception flag to match spec,
Stafford Horne <=
[Qemu-devel] [PULL v2 23/25] linux-user: Fix struct sigaltstack for openrisc, Stafford Horne, 2018/07/02
Re: [Qemu-devel] [PULL v2 00/25] OpenRISC updates for 3.0, Peter Maydell, 2018/07/02