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[Qemu-devel] [PULL v1 30/38] target-microblaze: Allow address sizes betw
From: |
Edgar E. Iglesias |
Subject: |
[Qemu-devel] [PULL v1 30/38] target-microblaze: Allow address sizes between 32 and 64 bits |
Date: |
Tue, 29 May 2018 12:50:03 +0200 |
From: "Edgar E. Iglesias" <address@hidden>
Allow address sizes between 32 and 64 bits.
Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
---
target/microblaze/cpu.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index 71fc8d09fe..9b546a2c18 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -155,9 +155,8 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
return;
}
- if (cpu->cfg.addr_size != 32) {
- error_setg(errp, "addr-size %d is out of range. "
- "Only 32bit is supported.",
+ if (cpu->cfg.addr_size < 32 || cpu->cfg.addr_size > 64) {
+ error_setg(errp, "addr-size %d is out of range (32 - 64)",
cpu->cfg.addr_size);
return;
}
--
2.14.1
- [Qemu-devel] [PULL v1 16/38] target-microblaze: Break out trap_illegal(), (continued)
- [Qemu-devel] [PULL v1 16/38] target-microblaze: Break out trap_illegal(), Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 18/38] target-microblaze: dec_msr: Reuse more code when reg-decoding, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 21/38] target-microblaze: Setup for 64bit addressing, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 23/38] target-microblaze: Implement MFSE EAR, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 20/38] target-microblaze: Make special registers 64-bit, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 24/38] target-microblaze: mmu: Add R_TBLX_MISS macros, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 26/38] target-microblaze: mmu: Prepare for 64-bit addresses, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 25/38] target-microblaze: mmu: Remove unused register state, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 27/38] target-microblaze: mmu: Add a configurable output address mask, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 28/38] target-microblaze: dec_msr: Plug a temp leak, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 30/38] target-microblaze: Allow address sizes between 32 and 64 bits,
Edgar E. Iglesias <=
- [Qemu-devel] [PULL v1 29/38] target-microblaze: Add support for extended access to TLBLO, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 31/38] target-microblaze: Simplify address computation using tcg_gen_addi_i32(), Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 32/38] target-microblaze: mmu: Cleanup debug log messages, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 33/38] target-microblaze: Use table based condition-codes conversion, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 36/38] target-microblaze: Use tcg_gen_movcond in eval_cond_jmp, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 34/38] target-microblaze: Remove argument b in eval_cc(), Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 35/38] target-microblaze: Convert env_btarget to i64, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 37/38] target-microblaze: cpu_mmu_index: Fixup indentation, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 38/38] target-microblaze: Consolidate MMU enabled checks, Edgar E. Iglesias, 2018/05/29
- Re: [Qemu-devel] [PULL v1 00/38] Xilinx queue, Peter Maydell, 2018/05/29