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[Qemu-devel] [PULL 20/36] target/arm/kvm: pmu: split init and set-irq st
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 20/36] target/arm/kvm: pmu: split init and set-irq stages |
Date: |
Mon, 4 Sep 2017 13:25:51 +0100 |
From: Andrew Jones <address@hidden>
When adding a PMU with a userspace irqchip we skip the set-irq
stage of device creation. Split the 'create' function into two
functions 'init' and 'set-irq' so they may be called separately.
Signed-off-by: Andrew Jones <address@hidden>
Reviewed-by: Christoffer Dall <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/kvm_arm.h | 10 ++++++++--
hw/arm/virt.c | 11 +++++++++--
target/arm/kvm32.c | 8 +++++++-
target/arm/kvm64.c | 52 +++++++++++++++++++++++++---------------------------
4 files changed, 49 insertions(+), 32 deletions(-)
diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h
index 633d088..cab5ea9 100644
--- a/target/arm/kvm_arm.h
+++ b/target/arm/kvm_arm.h
@@ -195,7 +195,8 @@ int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu);
int kvm_arm_vgic_probe(void);
-int kvm_arm_pmu_create(CPUState *cs, int irq);
+int kvm_arm_pmu_set_irq(CPUState *cs, int irq);
+int kvm_arm_pmu_init(CPUState *cs);
#else
@@ -204,7 +205,12 @@ static inline int kvm_arm_vgic_probe(void)
return 0;
}
-static inline int kvm_arm_pmu_create(CPUState *cs, int irq)
+static inline int kvm_arm_pmu_set_irq(CPUState *cs, int irq)
+{
+ return 0;
+}
+
+static inline int kvm_arm_pmu_init(CPUState *cs)
{
return 0;
}
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index a06ec13..d6e2486 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -492,10 +492,17 @@ static void fdt_add_pmu_nodes(const VirtMachineState *vms)
CPU_FOREACH(cpu) {
armcpu = ARM_CPU(cpu);
- if (!arm_feature(&armcpu->env, ARM_FEATURE_PMU) ||
- (kvm_enabled() && !kvm_arm_pmu_create(cpu, PPI(VIRTUAL_PMU_IRQ))))
{
+ if (!arm_feature(&armcpu->env, ARM_FEATURE_PMU)) {
return;
}
+ if (kvm_enabled()) {
+ if (!kvm_arm_pmu_set_irq(cpu, PPI(VIRTUAL_PMU_IRQ))) {
+ return;
+ }
+ if (!kvm_arm_pmu_init(cpu)) {
+ return;
+ }
+ }
}
if (vms->gic_version == 2) {
diff --git a/target/arm/kvm32.c b/target/arm/kvm32.c
index 069da0c..e3aab89 100644
--- a/target/arm/kvm32.c
+++ b/target/arm/kvm32.c
@@ -522,7 +522,13 @@ bool kvm_arm_hw_debug_active(CPUState *cs)
return false;
}
-int kvm_arm_pmu_create(CPUState *cs, int irq)
+int kvm_arm_pmu_set_irq(CPUState *cs, int irq)
+{
+ qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
+ return 0;
+}
+
+int kvm_arm_pmu_init(CPUState *cs)
{
qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
return 0;
diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
index a16abc8..e26638a 100644
--- a/target/arm/kvm64.c
+++ b/target/arm/kvm64.c
@@ -381,46 +381,44 @@ static CPUWatchpoint *find_hw_watchpoint(CPUState *cpu,
target_ulong addr)
return NULL;
}
-static bool kvm_arm_pmu_support_ctrl(CPUState *cs, struct kvm_device_attr
*attr)
-{
- return kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, attr) == 0;
-}
-
-int kvm_arm_pmu_create(CPUState *cs, int irq)
+static bool kvm_arm_pmu_set_attr(CPUState *cs, struct kvm_device_attr *attr)
{
int err;
- struct kvm_device_attr attr = {
- .group = KVM_ARM_VCPU_PMU_V3_CTRL,
- .addr = (intptr_t)&irq,
- .attr = KVM_ARM_VCPU_PMU_V3_IRQ,
- .flags = 0,
- };
-
- if (!kvm_arm_pmu_support_ctrl(cs, &attr)) {
- return 0;
+ err = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, attr);
+ if (err != 0) {
+ return false;
}
- err = kvm_vcpu_ioctl(cs, KVM_SET_DEVICE_ATTR, &attr);
+ err = kvm_vcpu_ioctl(cs, KVM_SET_DEVICE_ATTR, attr);
if (err < 0) {
fprintf(stderr, "KVM_SET_DEVICE_ATTR failed: %s\n",
strerror(-err));
abort();
}
- attr.group = KVM_ARM_VCPU_PMU_V3_CTRL;
- attr.attr = KVM_ARM_VCPU_PMU_V3_INIT;
- attr.addr = 0;
- attr.flags = 0;
+ return true;
+}
- err = kvm_vcpu_ioctl(cs, KVM_SET_DEVICE_ATTR, &attr);
- if (err < 0) {
- fprintf(stderr, "KVM_SET_DEVICE_ATTR failed: %s\n",
- strerror(-err));
- abort();
- }
+int kvm_arm_pmu_init(CPUState *cs)
+{
+ struct kvm_device_attr attr = {
+ .group = KVM_ARM_VCPU_PMU_V3_CTRL,
+ .attr = KVM_ARM_VCPU_PMU_V3_INIT,
+ };
+
+ return kvm_arm_pmu_set_attr(cs, &attr);
+}
+
+int kvm_arm_pmu_set_irq(CPUState *cs, int irq)
+{
+ struct kvm_device_attr attr = {
+ .group = KVM_ARM_VCPU_PMU_V3_CTRL,
+ .addr = (intptr_t)&irq,
+ .attr = KVM_ARM_VCPU_PMU_V3_IRQ,
+ };
- return 1;
+ return kvm_arm_pmu_set_attr(cs, &attr);
}
static inline void set_feature(uint64_t *features, int feature)
--
2.7.4
- [Qemu-devel] [PULL 18/36] hw/arm: use defined type name instead of hard-coded string, (continued)
- [Qemu-devel] [PULL 18/36] hw/arm: use defined type name instead of hard-coded string, Peter Maydell, 2017/09/04
- [Qemu-devel] [PULL 15/36] nvic: Implement "user accesses BusFault" SCS region behaviour, Peter Maydell, 2017/09/04
- [Qemu-devel] [PULL 14/36] armv7m_nvic.h: Move from include/hw/arm to include/hw/intc, Peter Maydell, 2017/09/04
- [Qemu-devel] [PULL 16/36] loader: Handle ELF files with overlapping zero-initialized data, Peter Maydell, 2017/09/04
- [Qemu-devel] [PULL 19/36] hw/arm/virt: add pmu interrupt state, Peter Maydell, 2017/09/04
- [Qemu-devel] [PULL 22/36] target/arm/kvm: pmu: improve error handling, Peter Maydell, 2017/09/04
- [Qemu-devel] [PULL 17/36] loader: Ignore zero-sized ELF segments, Peter Maydell, 2017/09/04
- [Qemu-devel] [PULL 21/36] hw/arm/virt: allow pmu instantiation with userspace irqchip, Peter Maydell, 2017/09/04
- [Qemu-devel] [PULL 24/36] aspeed_soc: Propagate silicon-rev to watchdog, Peter Maydell, 2017/09/04
- [Qemu-devel] [PULL 25/36] memory.h: Move MemTxResult type to memattrs.h, Peter Maydell, 2017/09/04
- [Qemu-devel] [PULL 20/36] target/arm/kvm: pmu: split init and set-irq stages,
Peter Maydell <=
- [Qemu-devel] [PULL 23/36] watchdog: wdt_aspeed: Add support for the reset width register, Peter Maydell, 2017/09/04
- [Qemu-devel] [PULL 26/36] cpu: Define new cpu_transaction_failed() hook, Peter Maydell, 2017/09/04
- [Qemu-devel] [PULL 32/36] target/arm: Implement new do_transaction_failed hook, Peter Maydell, 2017/09/04
- [Qemu-devel] [PULL 34/36] hw/arm/digic: Mark device with user_creatable = false, Peter Maydell, 2017/09/04
- [Qemu-devel] [PULL 27/36] cputlb: Support generating CPU exceptions on memory transaction failures, Peter Maydell, 2017/09/04
- [Qemu-devel] [PULL 31/36] target/arm: Allow deliver_fault() caller to specify EA bit, Peter Maydell, 2017/09/04
- [Qemu-devel] [PULL 33/36] hw/arm/aspeed_soc: Mark devices as user_creatable = false, Peter Maydell, 2017/09/04
- [Qemu-devel] [PULL 29/36] hw/arm: Set ignore_memory_transaction_failures for most ARM boards, Peter Maydell, 2017/09/04
- [Qemu-devel] [PULL 35/36] target/arm: Fix aa64 ldp register writeback, Peter Maydell, 2017/09/04
- [Qemu-devel] [PULL 36/36] arm_gicv3_kvm: Fix compile warning, Peter Maydell, 2017/09/04