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Re: [Qemu-devel] [PATCH v2 6/8] cpu: make CPU_INTERRUPT_RESET available
From: |
Andreas Färber |
Subject: |
Re: [Qemu-devel] [PATCH v2 6/8] cpu: make CPU_INTERRUPT_RESET available on all targets |
Date: |
Mon, 12 May 2014 09:47:42 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.4.0 |
Am 02.05.2014 16:33, schrieb Paolo Bonzini:
> On the x86, some devices need access to the CPU reset pin (INIT#).
> Provide a generic service to do this, using one of the internal
> cpu_interrupt targets. Generalize the PPC-specific code for
> CPU_INTERRUPT_RESET to other targets.
>
> Since PPC does not support migration across QEMU versions (its
> machine types are not versioned yet), I picked the value that
> is used on x86, CPU_INTERRUPT_TGT_INT_1. Consequently, TGT_INT_2
> and TGT_INT_3 are shifted down by one while keeping their value.
>
> Reviewed-by: Anthony Liguori <address@hidden>
> Signed-off-by: Paolo Bonzini <address@hidden>
> ---
> cpu-exec.c | 23 +++++++++++++----------
> cpus.c | 9 +++++++++
> include/exec/cpu-all.h | 8 +++++---
> include/sysemu/cpus.h | 1 +
> target-i386/cpu.h | 7 ++++---
> target-ppc/cpu.h | 3 ---
> 6 files changed, 32 insertions(+), 19 deletions(-)
No objection from my side, but I thought there had been agreement among
Anthony, Peter and others that soft-reset is nothing generic that can be
implemented as API?
s390x has multiple ways to do resets, same for ppc, and I thought the
suggested way to implement them was a qemu_irq in the particular piece
of hardware together with custom reset functions as done for s390x?
CC'ing some more maintainers.
IIRC Richard was against exposing target interrupt codes to generic code
when I tried to clean up some header by moving things to qom/cpu.h.
Regards,
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
- Re: [Qemu-devel] [PATCH v2 3/8] target-i386: fix set of registers zeroed on reset, (continued)
- [Qemu-devel] [PATCH v2 4/8] target-i386: preserve FPU and MSR state on INIT, Paolo Bonzini, 2014/05/02
- [Qemu-devel] [PATCH v2 5/8] apic: do not accept SIPI on the bootstrap processor, Paolo Bonzini, 2014/05/02
- [Qemu-devel] [PATCH v2 2/8] kvm: forward INIT signals coming from the chipset, Paolo Bonzini, 2014/05/02
- [Qemu-devel] [PATCH v2 7/8] pc: port 92 reset requires a low->high transition, Paolo Bonzini, 2014/05/02
- [Qemu-devel] [PATCH v2 6/8] cpu: make CPU_INTERRUPT_RESET available on all targets, Paolo Bonzini, 2014/05/02
- Re: [Qemu-devel] [PATCH v2 6/8] cpu: make CPU_INTERRUPT_RESET available on all targets,
Andreas Färber <=
- Re: [Qemu-devel] [PATCH v2 6/8] cpu: make CPU_INTERRUPT_RESET available on all targets, Peter Maydell, 2014/05/23
- Re: [Qemu-devel] [PATCH v2 6/8] cpu: make CPU_INTERRUPT_RESET available on all targets, Paolo Bonzini, 2014/05/23
- Re: [Qemu-devel] [PATCH v2 6/8] cpu: make CPU_INTERRUPT_RESET available on all targets, Peter Maydell, 2014/05/24
- Re: [Qemu-devel] [PATCH v2 6/8] cpu: make CPU_INTERRUPT_RESET available on all targets, Paolo Bonzini, 2014/05/24
- Re: [Qemu-devel] [PATCH v2 6/8] cpu: make CPU_INTERRUPT_RESET available on all targets, Peter Maydell, 2014/05/24
- Re: [Qemu-devel] [PATCH v2 6/8] cpu: make CPU_INTERRUPT_RESET available on all targets, Paolo Bonzini, 2014/05/27
[Qemu-devel] [PATCH v2 8/8] x86: correctly implement soft reset, Paolo Bonzini, 2014/05/02