[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH v2 6/8] cpu: make CPU_INTERRUPT_RESET available
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v2 6/8] cpu: make CPU_INTERRUPT_RESET available on all targets |
Date: |
Fri, 23 May 2014 18:59:01 +0100 |
On 2 May 2014 15:33, Paolo Bonzini <address@hidden> wrote:
> On the x86, some devices need access to the CPU reset pin (INIT#).
> Provide a generic service to do this, using one of the internal
> cpu_interrupt targets. Generalize the PPC-specific code for
> CPU_INTERRUPT_RESET to other targets.
>
> Since PPC does not support migration across QEMU versions (its
> machine types are not versioned yet), I picked the value that
> is used on x86, CPU_INTERRUPT_TGT_INT_1. Consequently, TGT_INT_2
> and TGT_INT_3 are shifted down by one while keeping their value.
>
> Reviewed-by: Anthony Liguori <address@hidden>
> Signed-off-by: Paolo Bonzini <address@hidden>
> ---
> cpu-exec.c | 23 +++++++++++++----------
> cpus.c | 9 +++++++++
> include/exec/cpu-all.h | 8 +++++---
> include/sysemu/cpus.h | 1 +
> target-i386/cpu.h | 7 ++++---
> target-ppc/cpu.h | 3 ---
> 6 files changed, 32 insertions(+), 19 deletions(-)
>
> diff --git a/cpu-exec.c b/cpu-exec.c
> index 2f54054..38e5f02 100644
> --- a/cpu-exec.c
> +++ b/cpu-exec.c
> @@ -336,19 +336,25 @@ int cpu_exec(CPUArchState *env)
> }
> #endif
> #if defined(TARGET_I386)
> + if (interrupt_request & CPU_INTERRUPT_INIT) {
> + cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0);
> + do_cpu_init(x86_cpu);
> + cpu->exception_index = EXCP_HALTED;
> + cpu_loop_exit(cpu);
> + }
> +#else
> + if (interrupt_request & CPU_INTERRUPT_RESET) {
> + cpu_reset(cpu);
> + }
> +#endif
I was looking at cleaning up the horrible ifdef ladder a little
lower in this function, and I noticed this code had been
added recently. Why is TARGET_I386 a special case here?
New #ifdef TARGET_* here are pretty bogus and we should
try to avoid them.
Could we have the CPU_INTERRUPT_RESET check be all-targets
and move the INTERRUPT_INIT check down below it to
be with all the other x86 specific interrupt test code ?
thanks
-- PMM
- [Qemu-devel] [PATCH v2 5/8] apic: do not accept SIPI on the bootstrap processor, (continued)
- [Qemu-devel] [PATCH v2 5/8] apic: do not accept SIPI on the bootstrap processor, Paolo Bonzini, 2014/05/02
- [Qemu-devel] [PATCH v2 2/8] kvm: forward INIT signals coming from the chipset, Paolo Bonzini, 2014/05/02
- [Qemu-devel] [PATCH v2 7/8] pc: port 92 reset requires a low->high transition, Paolo Bonzini, 2014/05/02
- [Qemu-devel] [PATCH v2 6/8] cpu: make CPU_INTERRUPT_RESET available on all targets, Paolo Bonzini, 2014/05/02
- Re: [Qemu-devel] [PATCH v2 6/8] cpu: make CPU_INTERRUPT_RESET available on all targets,
Peter Maydell <=
- Re: [Qemu-devel] [PATCH v2 6/8] cpu: make CPU_INTERRUPT_RESET available on all targets, Paolo Bonzini, 2014/05/23
- Re: [Qemu-devel] [PATCH v2 6/8] cpu: make CPU_INTERRUPT_RESET available on all targets, Peter Maydell, 2014/05/24
- Re: [Qemu-devel] [PATCH v2 6/8] cpu: make CPU_INTERRUPT_RESET available on all targets, Paolo Bonzini, 2014/05/24
- Re: [Qemu-devel] [PATCH v2 6/8] cpu: make CPU_INTERRUPT_RESET available on all targets, Peter Maydell, 2014/05/24
- Re: [Qemu-devel] [PATCH v2 6/8] cpu: make CPU_INTERRUPT_RESET available on all targets, Paolo Bonzini, 2014/05/27
[Qemu-devel] [PATCH v2 8/8] x86: correctly implement soft reset, Paolo Bonzini, 2014/05/02
Re: [Qemu-devel] [PATCH v2 0/8] x86: correctly implement soft reset, Michael S. Tsirkin, 2014/05/05