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[Qemu-devel] [PATCH 5/8] apic: do not accept SIPI on the bootstrap proce
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PATCH 5/8] apic: do not accept SIPI on the bootstrap processor |
Date: |
Tue, 29 Apr 2014 13:54:29 +0200 |
SIPI interrupts are ignored on the BSP. Never accept one.
Cc: Andreas Färber <address@hidden>
Cc: Michael S. Tsirkin <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
---
hw/intc/apic_common.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c
index 7ecce2d..05c0e08 100644
--- a/hw/intc/apic_common.c
+++ b/hw/intc/apic_common.c
@@ -200,7 +200,7 @@ void apic_init_reset(DeviceState *dev)
s->initial_count = 0;
s->initial_count_load_time = 0;
s->next_time = 0;
- s->wait_for_sipi = 1;
+ s->wait_for_sipi = !cpu_is_bsp(s->cpu);
if (s->timer) {
timer_del(s->timer);
--
1.8.3.1
- [Qemu-devel] [PATCH 0/8] x86: correctly implement soft reset, Paolo Bonzini, 2014/04/29
- [Qemu-devel] [PATCH 3/8] target-i386: fix set of registers zeroed on reset, Paolo Bonzini, 2014/04/29
- [Qemu-devel] [PATCH 1/8] kvm: reset state from the CPU's reset method, Paolo Bonzini, 2014/04/29
- [Qemu-devel] [PATCH 5/8] apic: do not accept SIPI on the bootstrap processor,
Paolo Bonzini <=
- [Qemu-devel] [PATCH 4/8] target-i386: preserve FPU and MSR state on INIT, Paolo Bonzini, 2014/04/29
- [Qemu-devel] [PATCH 2/8] kvm: forward INIT signals coming from the chipset, Paolo Bonzini, 2014/04/29
- [Qemu-devel] [PATCH 6/8] cpu: make CPU_INTERRUPT_RESET available on all targets, Paolo Bonzini, 2014/04/29
- [Qemu-devel] [PATCH 7/8] pc: port 92 reset requires a low->high transition, Paolo Bonzini, 2014/04/29
- [Qemu-devel] [PATCH 8/8] x86: correctly implement soft reset, Paolo Bonzini, 2014/04/29