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[Qemu-devel] [PATCH 2/8] kvm: forward INIT signals coming from the chips
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PATCH 2/8] kvm: forward INIT signals coming from the chipset |
Date: |
Tue, 29 Apr 2014 13:54:26 +0200 |
Reviewed-by: Gleb Natapov <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
---
target-i386/helper.c | 4 ++++
target-i386/kvm.c | 36 +++++++++++++++++++++++++-----------
target-i386/kvm_i386.h | 1 +
3 files changed, 30 insertions(+), 11 deletions(-)
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 372f0e3..27b3582 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -19,6 +19,7 @@
#include "cpu.h"
#include "sysemu/kvm.h"
+#include "kvm_i386.h"
#ifndef CONFIG_USER_ONLY
#include "sysemu/sysemu.h"
#include "monitor/monitor.h"
@@ -1335,6 +1336,9 @@ void do_cpu_init(X86CPU *cpu)
cpu_reset(cs);
cs->interrupt_request = sipi;
env->pat = pat;
+ if (kvm_enabled()) {
+ kvm_arch_do_init_vcpu(cpu);
+ }
apic_init_reset(cpu->apic_state);
}
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 2319d78..1c0565f 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -30,6 +30,8 @@
#include "qemu/config-file.h"
#include "hw/i386/pc.h"
#include "hw/i386/apic.h"
+#include "hw/i386/apic_internal.h"
+#include "hw/i386/apic-msidef.h"
#include "exec/ioport.h"
#include <asm/hyperv.h>
#include "hw/pci/pci.h"
@@ -739,6 +741,16 @@ void kvm_arch_reset_vcpu(X86CPU *cpu)
}
}
+void kvm_arch_do_init_vcpu(X86CPU *cpu)
+{
+ CPUX86State *env = &cpu->env;
+
+ /* APs get directly into wait-for-SIPI state. */
+ if (env->mp_state == KVM_MP_STATE_UNINITIALIZED) {
+ env->mp_state = KVM_MP_STATE_INIT_RECEIVED;
+ }
+}
+
static int kvm_get_supported_msrs(KVMState *s)
{
static int kvm_supported_msrs;
@@ -2004,14 +2016,15 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run
*run)
}
}
- if (!kvm_irqchip_in_kernel()) {
- /* Force the VCPU out of its inner loop to process any INIT requests
- * or pending TPR access reports. */
- if (cpu->interrupt_request &
- (CPU_INTERRUPT_INIT | CPU_INTERRUPT_TPR)) {
- cpu->exit_request = 1;
- }
+ /* Force the VCPU out of its inner loop to process any INIT requests
+ * or (for userspace APIC, but it is cheap to combine the checks here)
+ * pending TPR access reports.
+ */
+ if (cpu->interrupt_request & (CPU_INTERRUPT_INIT | CPU_INTERRUPT_TPR)) {
+ cpu->exit_request = 1;
+ }
+ if (!kvm_irqchip_in_kernel()) {
/* Try to inject an interrupt if the guest can accept it */
if (run->ready_for_interrupt_injection &&
(cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
@@ -2091,6 +2104,11 @@ int kvm_arch_process_async_events(CPUState *cs)
}
}
+ if (cs->interrupt_request & CPU_INTERRUPT_INIT) {
+ kvm_cpu_synchronize_state(cs);
+ do_cpu_init(cpu);
+ }
+
if (kvm_irqchip_in_kernel()) {
return 0;
}
@@ -2104,10 +2122,6 @@ int kvm_arch_process_async_events(CPUState *cs)
(cs->interrupt_request & CPU_INTERRUPT_NMI)) {
cs->halted = 0;
}
- if (cs->interrupt_request & CPU_INTERRUPT_INIT) {
- kvm_cpu_synchronize_state(cs);
- do_cpu_init(cpu);
- }
if (cs->interrupt_request & CPU_INTERRUPT_SIPI) {
kvm_cpu_synchronize_state(cs);
do_cpu_sipi(cpu);
diff --git a/target-i386/kvm_i386.h b/target-i386/kvm_i386.h
index b0b2193..cac30fd 100644
--- a/target-i386/kvm_i386.h
+++ b/target-i386/kvm_i386.h
@@ -15,6 +15,7 @@
bool kvm_allows_irq0_override(void);
void kvm_arch_reset_vcpu(X86CPU *cs);
+void kvm_arch_do_init_vcpu(X86CPU *cs);
int kvm_device_pci_assign(KVMState *s, PCIHostDeviceAddress *dev_addr,
uint32_t flags, uint32_t *dev_id);
--
1.8.3.1
- [Qemu-devel] [PATCH 0/8] x86: correctly implement soft reset, Paolo Bonzini, 2014/04/29
- [Qemu-devel] [PATCH 3/8] target-i386: fix set of registers zeroed on reset, Paolo Bonzini, 2014/04/29
- [Qemu-devel] [PATCH 1/8] kvm: reset state from the CPU's reset method, Paolo Bonzini, 2014/04/29
- [Qemu-devel] [PATCH 5/8] apic: do not accept SIPI on the bootstrap processor, Paolo Bonzini, 2014/04/29
- [Qemu-devel] [PATCH 4/8] target-i386: preserve FPU and MSR state on INIT, Paolo Bonzini, 2014/04/29
- [Qemu-devel] [PATCH 2/8] kvm: forward INIT signals coming from the chipset,
Paolo Bonzini <=
- [Qemu-devel] [PATCH 6/8] cpu: make CPU_INTERRUPT_RESET available on all targets, Paolo Bonzini, 2014/04/29
- [Qemu-devel] [PATCH 7/8] pc: port 92 reset requires a low->high transition, Paolo Bonzini, 2014/04/29
- [Qemu-devel] [PATCH 8/8] x86: correctly implement soft reset, Paolo Bonzini, 2014/04/29