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Re: [Qemu-devel] [PATCH v3 12/31] target-arm: Implement AArch64 TTBR*
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v3 12/31] target-arm: Implement AArch64 TTBR* |
Date: |
Wed, 26 Feb 2014 09:50:58 +0000 |
On 26 February 2014 06:33, Hu Tao <address@hidden> wrote:
> On Sat, Feb 15, 2014 at 04:07:05PM +0000, Peter Maydell wrote:
>
> <...>
>
>> diff --git a/target-arm/cpu.h b/target-arm/cpu.h
>> index 06953ac..7cbe69b 100644
>> --- a/target-arm/cpu.h
>> +++ b/target-arm/cpu.h
>> @@ -173,10 +173,8 @@ typedef struct CPUARMState {
>> uint32_t c1_coproc; /* Coprocessor access register. */
>> uint32_t c1_xscaleauxcr; /* XScale auxiliary control register. */
>> uint32_t c1_scr; /* secure config register. */
>> - uint32_t c2_base0; /* MMU translation table base 0. */
>> - uint32_t c2_base0_hi; /* MMU translation table base 0, high 32 bits
>> */
>> - uint32_t c2_base1; /* MMU translation table base 0. */
>> - uint32_t c2_base1_hi; /* MMU translation table base 1, high 32 bits
>> */
>> + uint64_t ttbr0_el1; /* MMU translation table base 0. */
>> + uint32_t ttbr1_el1; /* MMU translation table base 1. */
>
> s/32/64/
Nice catch, not sure how I missed that.
thanks
-- PMM
- [Qemu-devel] [PATCH v3 13/31] target-arm: Implement AArch64 MPIDR, (continued)
- [Qemu-devel] [PATCH v3 13/31] target-arm: Implement AArch64 MPIDR, Peter Maydell, 2014/02/15
- [Qemu-devel] [PATCH v3 19/31] target-arm: A64: Implement WFI, Peter Maydell, 2014/02/15
- [Qemu-devel] [PATCH v3 11/31] target-arm: Implement AArch64 VBAR_EL1, Peter Maydell, 2014/02/15
- [Qemu-devel] [PATCH v3 20/31] target-arm: Store AIF bits in env->pstate for AArch32, Peter Maydell, 2014/02/15
- [Qemu-devel] [PATCH v3 09/31] target-arm: Implement AArch64 SCTLR_EL1, Peter Maydell, 2014/02/15
- [Qemu-devel] [PATCH v3 10/31] target-arm: Implement AArch64 TCR_EL1, Peter Maydell, 2014/02/15
- [Qemu-devel] [PATCH v3 12/31] target-arm: Implement AArch64 TTBR*, Peter Maydell, 2014/02/15
- [Qemu-devel] [PATCH v3 01/31] target-arm: Fix raw read and write functions on AArch64 registers, Peter Maydell, 2014/02/15
- [Qemu-devel] [PATCH v3 17/31] target-arm: Implement AArch64 OSLAR_EL1 sysreg as WI, Peter Maydell, 2014/02/15
- [Qemu-devel] [PATCH v3 24/31] target-arm: Add utility function for checking AA32/64 state of an EL, Peter Maydell, 2014/02/15
- [Qemu-devel] [PATCH v3 23/31] target-arm: Implement AArch64 view of CPACR, Peter Maydell, 2014/02/15
- [Qemu-devel] [PATCH v3 22/31] target-arm: A64: Implement MSR (immediate) instructions, Peter Maydell, 2014/02/15
- [Qemu-devel] [PATCH v3 16/31] target-arm: Implement AArch64 dummy breakpoint and watchpoint registers, Peter Maydell, 2014/02/15