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[Qemu-devel] [PULL 05/24] xilinx_spips: Fix QSPI FIFO size
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 05/24] xilinx_spips: Fix QSPI FIFO size |
Date: |
Mon, 3 Jun 2013 17:30:02 +0100 |
From: Peter Crosthwaite <address@hidden>
QSPI has a bigger FIFO than the regular SPI controller. Differentiate
between the two with correct FIFO sizes for each.
This is the first piece of class data for SPIPS, so this patch sees
the creation of the XilinxSPIPSClass definition and assoicated QOM
constructs.
Signed-off-by: Peter Crosthwaite <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/ssi/xilinx_spips.c | 27 +++++++++++++++++++++++++--
1 file changed, 25 insertions(+), 2 deletions(-)
diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c
index 29636ce..86f33ef 100644
--- a/hw/ssi/xilinx_spips.c
+++ b/hw/ssi/xilinx_spips.c
@@ -106,6 +106,9 @@
#define RXFF_A 32
#define TXFF_A 32
+#define RXFF_A_Q (64 * 4)
+#define TXFF_A_Q (64 * 4)
+
/* 16MB per linear region */
#define LQSPI_ADDRESS_BITS 24
/* Bite off 4k chunks at a time */
@@ -159,12 +162,23 @@ typedef struct {
hwaddr lqspi_cached_addr;
} XilinxQSPIPS;
+typedef struct XilinxSPIPSClass {
+ SysBusDeviceClass parent_class;
+
+ uint32_t rx_fifo_size;
+ uint32_t tx_fifo_size;
+} XilinxSPIPSClass;
#define TYPE_XILINX_SPIPS "xlnx.ps7-spi"
#define TYPE_XILINX_QSPIPS "xlnx.ps7-qspi"
#define XILINX_SPIPS(obj) \
OBJECT_CHECK(XilinxSPIPS, (obj), TYPE_XILINX_SPIPS)
+#define XILINX_SPIPS_CLASS(klass) \
+ OBJECT_CLASS_CHECK(XilinxSPIPSClass, (klass), TYPE_XILINX_SPIPS)
+#define XILINX_SPIPS_GET_CLASS(obj) \
+ OBJECT_GET_CLASS(XilinxSPIPSClass, (obj), TYPE_XILINX_SPIPS)
+
#define XILINX_QSPIPS(obj) \
OBJECT_CHECK(XilinxQSPIPS, (obj), TYPE_XILINX_QSPIPS)
@@ -531,6 +545,7 @@ static void xilinx_spips_realize(DeviceState *dev, Error
**errp)
{
XilinxSPIPS *s = XILINX_SPIPS(dev);
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
+ XilinxSPIPSClass *xsc = XILINX_SPIPS_GET_CLASS(s);
int i;
DB_PRINT("realized spips\n");
@@ -555,8 +570,8 @@ static void xilinx_spips_realize(DeviceState *dev, Error
**errp)
s->irqline = -1;
- fifo8_create(&s->rx_fifo, RXFF_A);
- fifo8_create(&s->tx_fifo, TXFF_A);
+ fifo8_create(&s->rx_fifo, xsc->rx_fifo_size);
+ fifo8_create(&s->tx_fifo, xsc->tx_fifo_size);
}
static void xilinx_qspips_realize(DeviceState *dev, Error **errp)
@@ -611,18 +626,25 @@ static Property xilinx_spips_properties[] = {
static void xilinx_qspips_class_init(ObjectClass *klass, void * data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ XilinxSPIPSClass *xsc = XILINX_SPIPS_CLASS(klass);
dc->realize = xilinx_qspips_realize;
+ xsc->rx_fifo_size = RXFF_A_Q;
+ xsc->tx_fifo_size = TXFF_A_Q;
}
static void xilinx_spips_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ XilinxSPIPSClass *xsc = XILINX_SPIPS_CLASS(klass);
dc->realize = xilinx_spips_realize;
dc->reset = xilinx_spips_reset;
dc->props = xilinx_spips_properties;
dc->vmsd = &vmstate_xilinx_spips;
+
+ xsc->rx_fifo_size = RXFF_A;
+ xsc->tx_fifo_size = TXFF_A;
}
static const TypeInfo xilinx_spips_info = {
@@ -630,6 +652,7 @@ static const TypeInfo xilinx_spips_info = {
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(XilinxSPIPS),
.class_init = xilinx_spips_class_init,
+ .class_size = sizeof(XilinxSPIPSClass),
};
static const TypeInfo xilinx_qspips_info = {
--
1.7.9.5
- [Qemu-devel] [PULL 14/24] xilinx_spips: lqspi: Push more data to tx-fifo, (continued)
- [Qemu-devel] [PULL 14/24] xilinx_spips: lqspi: Push more data to tx-fifo, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 24/24] i.MX: Improve EPIT timer code., Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 12/24] xilinx_spips: Debug msgs for Snoop state, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 13/24] xilinx_spips: Multiple debug verbosity levels, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 06/24] xilinx_spips: Trash LQ page cache on mode change, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 15/24] xilinx_spips: lqspi: Fix byte/misaligned access, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 19/24] sd/sdhci:ADMA: fix interrupt, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 23/24] exynos4210.c: register rom_mem for memory migration, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 16/24] sd/sdhci.c: Only reset data_count on new commands, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 03/24] xilinx_spips: Inhibit interrupts in LQSPI mode, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 05/24] xilinx_spips: Fix QSPI FIFO size,
Peter Maydell <=
- [Qemu-devel] [PULL 04/24] xilinx_spips: Add verbose LQSPI debug output, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 21/24] i.MX: split GPT and EPIT timer implementation, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 17/24] sd/sdhci: Fix Buffer Write Ready interrupt, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 08/24] xilinx_spips: Implement automatic CS, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 22/24] hw/arm/exynos4210.c: convert chipid_and_omr to an mmio region, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 02/24] xilinx_spips: Make interrupts clear on read, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 07/24] xilinx_spips: Add automatic start support, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 20/24] sd/sd.c: Fix "inquiry" ACMD41, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 11/24] xilinx_spips: Fix striping behaviour, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 01/24] xilinx_spips: seperate SPI and QSPI as two classes, Peter Maydell, 2013/06/03