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[Qemu-devel] [PULL 22/24] hw/arm/exynos4210.c: convert chipid_and_omr to
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 22/24] hw/arm/exynos4210.c: convert chipid_and_omr to an mmio region |
Date: |
Mon, 3 Jun 2013 17:30:19 +0100 |
From: Igor Mitsyanko <address@hidden>
Exynos SoC was misusing memory_region_init_ram_ptr(): this interface can safely
be used only for memory regions which size is a multiple of target page size.
Change chipid_and_omr memory to an mmio region to fix this.
Signed-off-by: Igor Mitsyanko <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/exynos4210.c | 27 ++++++++++++++++++++++++---
1 file changed, 24 insertions(+), 3 deletions(-)
diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
index c8101d3..502b106 100644
--- a/hw/arm/exynos4210.c
+++ b/hw/arm/exynos4210.c
@@ -79,6 +79,28 @@
static uint8_t chipid_and_omr[] = { 0x11, 0x02, 0x21, 0x43,
0x09, 0x00, 0x00, 0x00 };
+static uint64_t exynos4210_chipid_and_omr_read(void *opaque, hwaddr offset,
+ unsigned size)
+{
+ assert(offset < sizeof(chipid_and_omr));
+ return chipid_and_omr[offset];
+}
+
+static void exynos4210_chipid_and_omr_write(void *opaque, hwaddr offset,
+ uint64_t value, unsigned size)
+{
+ return;
+}
+
+static const MemoryRegionOps exynos4210_chipid_and_omr_ops = {
+ .read = exynos4210_chipid_and_omr_read,
+ .write = exynos4210_chipid_and_omr_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .impl = {
+ .max_access_size = 1,
+ }
+};
+
void exynos4210_write_secondary(ARMCPU *cpu,
const struct arm_boot_info *info)
{
@@ -219,9 +241,8 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
/*** Memory ***/
/* Chip-ID and OMR */
- memory_region_init_ram_ptr(&s->chipid_mem, "exynos4210.chipid",
- sizeof(chipid_and_omr), chipid_and_omr);
- memory_region_set_readonly(&s->chipid_mem, true);
+ memory_region_init_io(&s->chipid_mem, &exynos4210_chipid_and_omr_ops,
+ NULL, "exynos4210.chipid", sizeof(chipid_and_omr));
memory_region_add_subregion(system_mem, EXYNOS4210_CHIPID_ADDR,
&s->chipid_mem);
--
1.7.9.5
- [Qemu-devel] [PULL 15/24] xilinx_spips: lqspi: Fix byte/misaligned access, (continued)
- [Qemu-devel] [PULL 15/24] xilinx_spips: lqspi: Fix byte/misaligned access, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 19/24] sd/sdhci:ADMA: fix interrupt, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 23/24] exynos4210.c: register rom_mem for memory migration, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 16/24] sd/sdhci.c: Only reset data_count on new commands, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 03/24] xilinx_spips: Inhibit interrupts in LQSPI mode, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 05/24] xilinx_spips: Fix QSPI FIFO size, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 04/24] xilinx_spips: Add verbose LQSPI debug output, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 21/24] i.MX: split GPT and EPIT timer implementation, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 17/24] sd/sdhci: Fix Buffer Write Ready interrupt, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 08/24] xilinx_spips: Implement automatic CS, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 22/24] hw/arm/exynos4210.c: convert chipid_and_omr to an mmio region,
Peter Maydell <=
- [Qemu-devel] [PULL 02/24] xilinx_spips: Make interrupts clear on read, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 07/24] xilinx_spips: Add automatic start support, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 20/24] sd/sd.c: Fix "inquiry" ACMD41, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 11/24] xilinx_spips: Fix striping behaviour, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 01/24] xilinx_spips: seperate SPI and QSPI as two classes, Peter Maydell, 2013/06/03
- [Qemu-devel] [PULL 18/24] sd/sdhci.c: Fix bdata_read DPRINT message, Peter Maydell, 2013/06/03
- Re: [Qemu-devel] [PULL 00/24] arm-devs queue, Anthony Liguori, 2013/06/17