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Re: [Qemu-devel] [PATCH RFC v3 14/21] target-arm: Move the PXA270's iwMM
From: |
andrzej zaborowski |
Subject: |
Re: [Qemu-devel] [PATCH RFC v3 14/21] target-arm: Move the PXA270's iwMMXt reset to pxa270_reset() |
Date: |
Fri, 17 Feb 2012 13:44:39 +0100 |
On 17 February 2012 13:03, Andreas Färber <address@hidden> wrote:
> Am 17.02.2012 10:59, schrieb andrzej zaborowski:
>> On 3 February 2012 03:59, Andreas Färber <address@hidden> wrote:
>>> No other emulated CPU uses this at this time.
>>
>> But why does this code better fit in hw/ than target-arm? The iwMMXt
>> registers are core registers after all.
>
> It seems you've misread something here. This is all in target-arm. :)
Yes, I did, sorry. I had looked at the whole series previously,
forgotten it, then looked at this patch that was still in my inbox
without any of the context.
...
> The final plan for rnpn is to have two QOM properties and to request a
> "pxa270" CPU, then set the revision since there are no functional
> dependencies on the revision at all. (cc'ing Paul)
> I've actually compile-tested and grep'ed this.
>
Sounds reasonable.
>
> Please note also the following v4 that came out of an IRC discussion:
> http://repo.or.cz/w/qemu/afaerber.git/commitdiff/1262acf06308cf2bde46520d0238548cb73c79fe
> If you need the JTAG_ID somewhere please let us know soon.
No, it's not used anywhere (obviously otherwise it wouldn't be a comment)
Cheers
- Re: [Qemu-devel] [PATCH RFC v3 05/21] target-arm: Embed CPUARMState in QOM ARMCPU, (continued)
[Qemu-devel] [PATCH RFC v3 14/21] target-arm: Move the PXA270's iwMMXt reset to pxa270_reset(), Andreas Färber, 2012/02/02
[Qemu-devel] [PATCH RFC v3 16/21] target-arm: Store VFP MVFR0 and MVFR1 in ARMCPUClass, Andreas Färber, 2012/02/02
[Qemu-devel] [FYI v3 21/21] target-arm: Just for testing!, Andreas Färber, 2012/02/02
[Qemu-devel] [PATCH RFC v3 10/21] target-arm: Store cp15 c0_c1 and c0_c2 in ARMCPUClass, Andreas Färber, 2012/02/02
[Qemu-devel] [PATCH RFC v3 15/21] target-arm: Store VFP FPSID register in ARMCPUClass, Andreas Färber, 2012/02/02
[Qemu-devel] [PATCH RFC v3 08/21] target-arm: Move CPU feature flags out of CPUState, Andreas Färber, 2012/02/02
[Qemu-devel] [PATCH RFC v3 18/21] target-arm: Store CCSIDRs in ARMCPUClass, Andreas Färber, 2012/02/02
[Qemu-devel] [PATCH RFC v3 11/21] target-arm: Store cp15 c0_cachetype register in ARMCPUClass, Andreas Färber, 2012/02/02