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Re: [Qemu-devel] [PATCH RFC v3 08/21] target-arm: Move CPU feature flags
From: |
Andreas Färber |
Subject: |
Re: [Qemu-devel] [PATCH RFC v3 08/21] target-arm: Move CPU feature flags out of CPUState |
Date: |
Tue, 07 Feb 2012 18:43:41 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:9.0) Gecko/20111220 Thunderbird/9.0 |
Am 07.02.2012 18:28, schrieb Peter Maydell:
> On 3 February 2012 02:59, Andreas Färber <address@hidden> wrote:
>> +static void sa11xx_class_init(ARMCPUClass *k, const ARMCPUInfo *info)
>> +{
>> + set_class_feature(k, ARM_FEATURE_STRONGARM);
>> +}
>
>> static const ARMCPUInfo arm_cpus[] = {
>> {
>> .name = "arm926",
>> .id = 0x41069265,
>> + .features = ARM_FEATURE(V5) |
>> + ARM_FEATURE(VFP),
>> },
>
>> {
>> .name = "sa1100",
>> .id = 0x4401A11B,
>> + .class_init = sa11xx_class_init,
>> },
>
> So why are we handling some of these feature bits by setting them
> in .features, and some of them via a .class_init which sets the
> feature bit?
To avoid duplication. This corresponds to fall-throughs in the switch.
Eventually as suggested by you we would get rid of some of these
duplicate models and let the user (or an alias-like compatibility
mechanism) set the desired revision numbers on one base class via QOM
properties. Then those class_inits would no longer be needed.
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
- Re: [Qemu-devel] [PATCH RFC v3 14/21] target-arm: Move the PXA270's iwMMXt reset to pxa270_reset(), (continued)
[Qemu-devel] [PATCH RFC v3 16/21] target-arm: Store VFP MVFR0 and MVFR1 in ARMCPUClass, Andreas Färber, 2012/02/02
[Qemu-devel] [FYI v3 21/21] target-arm: Just for testing!, Andreas Färber, 2012/02/02
[Qemu-devel] [PATCH RFC v3 10/21] target-arm: Store cp15 c0_c1 and c0_c2 in ARMCPUClass, Andreas Färber, 2012/02/02
[Qemu-devel] [PATCH RFC v3 15/21] target-arm: Store VFP FPSID register in ARMCPUClass, Andreas Färber, 2012/02/02
[Qemu-devel] [PATCH RFC v3 08/21] target-arm: Move CPU feature flags out of CPUState, Andreas Färber, 2012/02/02
[Qemu-devel] [PATCH RFC v3 18/21] target-arm: Store CCSIDRs in ARMCPUClass, Andreas Färber, 2012/02/02
[Qemu-devel] [PATCH RFC v3 11/21] target-arm: Store cp15 c0_cachetype register in ARMCPUClass, Andreas Färber, 2012/02/02
[Qemu-devel] [PATCH RFC v3 12/21] target-arm: Move cp15 c1_sys register to ARMCPUClass, Andreas Färber, 2012/02/02
[Qemu-devel] [PATCH RFC v3 20/21] target-arm: Prepare halted property for CPU, Andreas Färber, 2012/02/02