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[Qemu-devel] [PATCH 03/23] PPC: Add CPU definitions for up to 32 guest C
From: |
Alexander Graf |
Subject: |
[Qemu-devel] [PATCH 03/23] PPC: Add CPU definitions for up to 32 guest CPUs |
Date: |
Thu, 21 Jul 2011 03:27:14 +0200 |
All guest CPUs need to be specified in the device trees. Since removing nodes
is easy with FDT, but adding nodes is not, we just put 32 CPU nodes into the
device tree and remove them later on init when not used.
Signed-off-by: Alexander Graf <address@hidden>
---
pc-bios/mpc8544ds.dtb | Bin 2277 -> 9699 bytes
pc-bios/mpc8544ds.dts | 437 +++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 437 insertions(+), 0 deletions(-)
diff --git a/pc-bios/mpc8544ds.dtb b/pc-bios/mpc8544ds.dtb
index
ae318b1fe83846cc2e133951a3666fcfcdf87f79..18667f87588e390018149e548468e1a119433eea
100644
GIT binary patch
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diff --git a/pc-bios/mpc8544ds.dts b/pc-bios/mpc8544ds.dts
index a88b47c..b127992 100644
--- a/pc-bios/mpc8544ds.dts
+++ b/pc-bios/mpc8544ds.dts
@@ -36,6 +36,443 @@
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0x1>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0x2>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0x3>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0x4>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0x5>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0x6>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0x7>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0x8>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0x9>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0xa>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0xb>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0xc>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0xd>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0xe>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0xf>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0x10>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0x11>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0x12>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0x13>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0x14>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0x15>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0x16>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0x17>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0x18>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0x19>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0x1a>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0x1b>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0x1c>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0x1d>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0x1e>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
+ };
+ PowerPC,address@hidden {
+ device_type = "cpu";
+ reg = <0x1f>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>;
};
};
--
1.6.0.2
- Re: [Qemu-devel] [PATCH 06/23] PPC: Fix IPI support in MPIC, (continued)
[Qemu-devel] [PATCH 21/23] PPC: E500: Remove unneeded CPU nodes, Alexander Graf, 2011/07/20
[Qemu-devel] [PATCH 22/23] PPC: E500: Update cpu-release-addr property in cpu nodes, Alexander Graf, 2011/07/20
[Qemu-devel] [PATCH 19/23] PPC: KVM: Add stubs for kvm helper functions, Alexander Graf, 2011/07/20
[Qemu-devel] [PATCH 01/23] PPC: Add secondary CPU spinning code, Alexander Graf, 2011/07/20
[Qemu-devel] [PATCH 04/23] PPC: Add CPU local MMIO regions to MPIC, Alexander Graf, 2011/07/20
[Qemu-devel] [PATCH 03/23] PPC: Add CPU definitions for up to 32 guest CPUs,
Alexander Graf <=
[Qemu-devel] [PATCH 18/23] PPC: KVM: Remove kvmppc_read_host_property, Alexander Graf, 2011/07/20
[Qemu-devel] [PATCH 08/23] PPC: Bump MPIC up to 32 supported CPUs, Alexander Graf, 2011/07/20
[Qemu-devel] [PATCH 23/23] PPC: E500: Bump CPU count to 32, Alexander Graf, 2011/07/20
[Qemu-devel] [PATCH 15/23] PPC: E500: Use generic kvm function for freq, Alexander Graf, 2011/07/20
[Qemu-devel] [PATCH 05/23] PPC: Extend MPIC MMIO range, Alexander Graf, 2011/07/20
[Qemu-devel] [PATCH 12/23] device tree: add nop_node, Alexander Graf, 2011/07/20