|Subject:||[Discuss-gnuradio] [GSoC2019]: First report from Bowen|
|Date:||Sun, 12 May 2019 16:18:49 +0000|
I am happy to be accepted by GSoC 2019 working on cycle-accurate simulation of Verilog. Here (https://b0wen-hu.github.io/2019/05/12/First-report/) is my first report.
## Progress this week
I have set up the working environment and read some tutorials for GNU Radio development in the last few days.
My current working environment is Ubuntu 18.04 LTS installed GNU Radio version 3.7.11 by apt, but I am considering switch to newest Ubuntu 19.04 which shipped with GNU Radio version 3.7.13 by apt.
I am following the tutorial and created my first module gr-howto (This may not be a good name, so I will change the module name in the coming week). I will continue to read tutorials, hopefully I could finish them (from chapter 2 to chapter 7) in the next week.
I also managed to run the simulation of a simple Verilog module with Verilator, it works as anticipated, you can find it here. This is just a standalone simulation program, in order to let the GNU Radio work with the Verilator-generated file, there are much work to do.
## Plan next week
Finish all the tutorials from chapter 2 to chapter 7.
Try to make the Verilator related header file available in GNU Radio blocks. A source block like this (flicker.v) would be a good start.
The module name gr-howto need to be changed.
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