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From: | ThomasK |
Subject: | Re: [Simulavr-devel] test mechanism |
Date: | Tue, 18 Aug 2009 18:49:00 +0200 |
User-agent: | Thunderbird 2.0.0.22 (X11/20090608) |
Hi Michael,now I know, what you mean. It took a little bit time on me. ;-) Yes, that's a real core change, which changes the behaviour of CBI and SBI. A feature, that can make people unlucky!
It looks so, that newer AVR cores (and devices) have this, M48/88/168/328 and also M164/324/644 and Tiny2313 and so one.
Behaviour in simulavr is now like in M128, means read complete byte, modify, write complete byte. For the new behaviour we need a new interface for IO registers, one is clearBit(bitnum), the other setBit(bitnum), not only read byte: operator char() and write byte: operator=. And then, of course, for all the hardware units, which have to provide this, not only a get and set method, but also a getbit/setbit method or other modifybit(bitval, bitnum).
And a flag for the core to signal old/new behaviour. All together a "nice" piece of work ... ;-)Question at all: do we have also some other "nice" features, which change the behaviour of core?
cu, Thomas
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