Re: [Simulavr-devel] Re: interrupt flag/enable bits update

[Theodore A. Roth]

On Fri, 28 Nov 2003, John Regehr wrote:

> Yeah, my eyes were seriously glazing over after looking at the Atmel
> manuals for a few hours...

Yeah, I can appreciate that, and the devices I did had relatively small 
vector tables.

> 
> > One last question. I noticed that the .SPI_STC flag is always set to NO_BIT
> > even though there is a SPIF flag bit. From the datasheet for the mega128:
> > ...
> > This seems a little problematic. I think you are right not to define the
> > flag by default. To handle this properly, it looks like the SPI VDev is
> > going to have to modify the vector table when the SS condition requires it.
> > Want do you think?
> 
> I'm not sure.  My inclination would be to define a flag bit in the
> IntVectTable only when the semantics of the flag are absolutely standard.
> As long as this is true for a lot of interrupts, then it's a win overall.
> There are a few int sources like SPI that are just going to require
> special code and it seems like this code is much better off placed in the
> SPI code than in the interrupt code, if that makes sense.

I'm thinking that the VDev should be allowed to modify the interrupt(s) that 
it is related too. Then, the SPI code can change the flag ctrl bit in the 
irq table when the SPIF bit needs to be examined.

I'm hoping that you are thinking about something like this for
avr_core_check_interrupts():

  if ((read (irq->enable.addr) & irq->enable.mask)
      && ((irq->flag.mask == 0) || 
          (read (irq->flag.addr) & irq->flag.mask)))
  {
      uint8_t clr_flag = read (irq->flag.addr) & ~irq->flag.mask;
        
      /* vector in the irq */

      write (irq->flag.addr, clf_flag);
  }

Ted Roth