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[Qemu-riscv] [PULL 17/19] target/riscv: Remove unused struct
From: |
Palmer Dabbelt |
Subject: |
[Qemu-riscv] [PULL 17/19] target/riscv: Remove unused struct |
Date: |
Tue, 19 Mar 2019 05:48:01 -0700 |
From: Alistair Francis <address@hidden>
Signed-off-by: Alistair Francis <address@hidden>
Signed-off-by: Palmer Dabbelt <address@hidden>
---
target/riscv/cpu.c | 6 ------
1 file changed, 6 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index feea169e1223..d61bce6d5581 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -80,12 +80,6 @@ const char * const riscv_intr_names[] = {
"reserved"
};
-typedef struct RISCVCPUInfo {
- const int bit_widths;
- const char *name;
- void (*initfn)(Object *obj);
-} RISCVCPUInfo;
-
static void set_misa(CPURISCVState *env, target_ulong misa)
{
env->misa_mask = env->misa = misa;
--
2.19.2
- [Qemu-riscv] [PULL] RISC-V Patches for 4.0-rc0, Part 2, Palmer Dabbelt, 2019/03/19
- [Qemu-riscv] [PULL 06/19] riscv: pmp: Log pmp access errors as guest errors, Palmer Dabbelt, 2019/03/19
- [Qemu-riscv] [PULL 19/19] riscv: sifive_u: Correct UART0's IRQ in the device tree, Palmer Dabbelt, 2019/03/19
- [Qemu-riscv] [PULL 18/19] riscv: sifive_uart: Generate TX interrupt, Palmer Dabbelt, 2019/03/19
- [Qemu-riscv] [PULL 17/19] target/riscv: Remove unused struct,
Palmer Dabbelt <=
- [Qemu-riscv] [PULL 16/19] riscv: sifive_u: Allow up to 4 CPUs to be created, Palmer Dabbelt, 2019/03/19
- [Qemu-riscv] [PULL 15/19] RISC-V: Update load reservation comment in do_interrupt, Palmer Dabbelt, 2019/03/19
- [Qemu-riscv] [PULL 14/19] RISC-V: Convert trap debugging to trace events, Palmer Dabbelt, 2019/03/19
- [Qemu-riscv] [PULL 13/19] RISC-V: Add support for vectored interrupts, Palmer Dabbelt, 2019/03/19
- [Qemu-riscv] [PULL 12/19] RISC-V: Change local interrupts from edge to level, Palmer Dabbelt, 2019/03/19
- [Qemu-riscv] [PULL 11/19] RISC-V: linux-user support for RVE ABI, Palmer Dabbelt, 2019/03/19
- [Qemu-riscv] [PULL 10/19] elf: Add RISC-V PSABI ELF header defines, Palmer Dabbelt, 2019/03/19
- [Qemu-riscv] [PULL 09/19] RISC-V: Remove unnecessary disassembler constraints, Palmer Dabbelt, 2019/03/19
- [Qemu-riscv] [PULL 05/19] RISC-V: Add hooks to use the gdb xml files., Palmer Dabbelt, 2019/03/19
- [Qemu-riscv] [PULL 07/19] RISC-V: Replace __builtin_popcount with ctpop8 in PLIC, Palmer Dabbelt, 2019/03/19