Re: [Qemu-devel] [PATCH v2 28/29] target/riscv: Remove decode_RV32

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Re: [Qemu-devel] [PATCH v2 28/29] target/riscv: Remove decode_RV32_64G()

From:	Richard Henderson
Subject:	Re: [Qemu-devel] [PATCH v2 28/29] target/riscv: Remove decode_RV32_64G()
Date:	Tue, 23 Oct 2018 10:04:04 +0100
User-agent:	Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1

On 10/20/18 8:14 AM, Bastian Koppelmann wrote:
> decodetree handles all instructions now so the fallback is not necessary
> anymore.
> 
> Signed-off-by: Bastian Koppelmann <address@hidden>
> Signed-off-by: Peer Adelt <address@hidden>
> ---
> v1 -> v2:
>     - Add missing gen_exception_illegal

Reviewed-by: Richard Henderson <address@hidden>

r~

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[Qemu-devel] [PATCH v2 13/29] target/riscv: Convert RV32D insns to decodetree, (continued)
- [Qemu-devel] [PATCH v2 13/29] target/riscv: Convert RV32D insns to decodetree, Bastian Koppelmann, 2018/10/20
  - Re: [Qemu-devel] [PATCH v2 13/29] target/riscv: Convert RV32D insns to decodetree, Richard Henderson, 2018/10/23
- [Qemu-devel] [PATCH v2 17/29] target/riscv: Convert quadrant 1 of RVXC insns to decodetree, Bastian Koppelmann, 2018/10/20
  - Re: [Qemu-devel] [PATCH v2 17/29] target/riscv: Convert quadrant 1 of RVXC insns to decodetree, Richard Henderson, 2018/10/23
- [Qemu-devel] [PATCH v2 16/29] target/riscv: Convert quadrant 0 of RVXC insns to decodetree, Bastian Koppelmann, 2018/10/20
  - Re: [Qemu-devel] [PATCH v2 16/29] target/riscv: Convert quadrant 0 of RVXC insns to decodetree, Richard Henderson, 2018/10/23
- [Qemu-devel] [PATCH v2 19/29] target/riscv: Remove gen_jalr(), Bastian Koppelmann, 2018/10/20
- [Qemu-devel] [PATCH v2 18/29] target/riscv: Convert quadrant 2 of RVXC insns to decodetree, Bastian Koppelmann, 2018/10/20
  - Re: [Qemu-devel] [PATCH v2 18/29] target/riscv: Convert quadrant 2 of RVXC insns to decodetree, Richard Henderson, 2018/10/23
- [Qemu-devel] [PATCH v2 28/29] target/riscv: Remove decode_RV32_64G(), Bastian Koppelmann, 2018/10/20
  - Re: [Qemu-devel] [PATCH v2 28/29] target/riscv: Remove decode_RV32_64G(), Richard Henderson <=
- [Qemu-devel] [PATCH v2 21/29] target/riscv: Remove manual decoding from gen_load(), Bastian Koppelmann, 2018/10/20
- [Qemu-devel] [PATCH v2 25/29] target/riscv: Remove shift and slt insn manual decoding, Bastian Koppelmann, 2018/10/20
- [Qemu-devel] [PATCH v2 27/29] target/riscv: Remove gen_system(), Bastian Koppelmann, 2018/10/20
- [Qemu-devel] [PATCH v2 20/29] target/riscv: Remove manual decoding from gen_branch(), Bastian Koppelmann, 2018/10/20
- [Qemu-devel] [PATCH v2 22/29] target/riscv: Remove manual decoding from gen_store(), Bastian Koppelmann, 2018/10/20
- [Qemu-devel] [PATCH v2 29/29] target/riscv: Rename trans_arith to gen_arith, Bastian Koppelmann, 2018/10/20
  - Re: [Qemu-devel] [PATCH v2 29/29] target/riscv: Rename trans_arith to gen_arith, Richard Henderson, 2018/10/23
- [Qemu-devel] [PATCH v2 23/29] target/riscv: Move gen_arith_imm() decoding into trans_* functions, Bastian Koppelmann, 2018/10/20
  - Re: [Qemu-devel] [PATCH v2 23/29] target/riscv: Move gen_arith_imm() decoding into trans_* functions, Richard Henderson, 2018/10/23
  - Re: [Qemu-devel] [PATCH v2 23/29] target/riscv: Move gen_arith_imm() decoding into trans_* functions, Bastian Koppelmann, 2018/10/24

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