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[Qemu-devel] [PULL 05/13] hw/arm/integratorcp: Support specifying featur
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 05/13] hw/arm/integratorcp: Support specifying features via -cpu |
Date: |
Tue, 7 Feb 2017 18:37:17 +0000 |
From: Julian Brown <address@hidden>
Since the integratorcp board creates the CPU object directly
rather than via cpu_arm_init(), we have to call the CPU
class parse_features() method ourselves if we want to
support the user passing features via the -cpu command
line argument as well as just the cpu name. Do so.
Signed-off-by: Julian Brown <address@hidden>
[PMM: split out into its own patch]
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/integratorcp.c | 19 +++++++++++++++++--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
index f81634d..5610ffc 100644
--- a/hw/arm/integratorcp.c
+++ b/hw/arm/integratorcp.c
@@ -577,27 +577,42 @@ static void integratorcp_init(MachineState *machine)
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
+ char **cpustr;
ObjectClass *cpu_oc;
+ CPUClass *cc;
Object *cpuobj;
ARMCPU *cpu;
+ const char *typename;
MemoryRegion *address_space_mem = get_system_memory();
MemoryRegion *ram = g_new(MemoryRegion, 1);
MemoryRegion *ram_alias = g_new(MemoryRegion, 1);
qemu_irq pic[32];
DeviceState *dev, *sic, *icp;
int i;
+ Error *err = NULL;
if (!cpu_model) {
cpu_model = "arm926";
}
- cpu_oc = cpu_class_by_name(TYPE_ARM_CPU, cpu_model);
+ cpustr = g_strsplit(cpu_model, ",", 2);
+
+ cpu_oc = cpu_class_by_name(TYPE_ARM_CPU, cpustr[0]);
if (!cpu_oc) {
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
}
+ typename = object_class_get_name(cpu_oc);
+
+ cc = CPU_CLASS(cpu_oc);
+ cc->parse_features(typename, cpustr[1], &err);
+ g_strfreev(cpustr);
+ if (err) {
+ error_report_err(err);
+ exit(1);
+ }
- cpuobj = object_new(object_class_get_name(cpu_oc));
+ cpuobj = object_new(typename);
/* By default ARM1176 CPUs have EL3 enabled. This board does not
* currently support EL3 so the CPU EL3 property is disabled before
--
2.7.4
- [Qemu-devel] [PULL 00/13] target-arm queue, Peter Maydell, 2017/02/07
- [Qemu-devel] [PULL 13/13] stellaris: Use the 'unimplemented' device for parts we don't implement, Peter Maydell, 2017/02/07
- [Qemu-devel] [PULL 12/13] hw/misc: New "unimplemented" sysbus device, Peter Maydell, 2017/02/07
- [Qemu-devel] [PULL 09/13] target/arm: Abstract out pbit/wbit tests in ARM ldr/str decode, Peter Maydell, 2017/02/07
- [Qemu-devel] [PULL 10/13] target/arm: A32, T32: Create Instruction Syndromes for Data Aborts, Peter Maydell, 2017/02/07
- [Qemu-devel] [PULL 08/13] arm: Correctly handle watchpoints for BE32 CPUs, Peter Maydell, 2017/02/07
- [Qemu-devel] [PULL 11/13] stellaris: Document memory map and which SoC devices are unimplemented, Peter Maydell, 2017/02/07
- [Qemu-devel] [PULL 06/13] target/arm: Add cfgend parameter for ARM CPU selection., Peter Maydell, 2017/02/07
- [Qemu-devel] [PULL 04/13] sd: sdhci: check data length during dma_memory_read, Peter Maydell, 2017/02/07
- [Qemu-devel] [PULL 05/13] hw/arm/integratorcp: Support specifying features via -cpu,
Peter Maydell <=
- [Qemu-devel] [PULL 07/13] Fix Thumb-1 BE32 execution and disassembly., Peter Maydell, 2017/02/07
- [Qemu-devel] [PULL 03/13] aspeed: add a watchdog controller, Peter Maydell, 2017/02/07
- [Qemu-devel] [PULL 02/13] wdt: Add Aspeed watchdog device model, Peter Maydell, 2017/02/07
- [Qemu-devel] [PULL 01/13] integratorcp: adding vmstate for save/restore, Peter Maydell, 2017/02/07
- Re: [Qemu-devel] [PULL 00/13] target-arm queue, Peter Maydell, 2017/02/07
- Re: [Qemu-devel] [PULL 00/13] target-arm queue, no-reply, 2017/02/07