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Re: [Qemu-devel] [PULL 00/13] target-arm queue
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PULL 00/13] target-arm queue |
Date: |
Tue, 7 Feb 2017 18:55:42 +0000 |
On 7 February 2017 at 18:37, Peter Maydell <address@hidden> wrote:
> A random mix of items here, nothing very major.
>
> thanks
> -- PMM
>
>
> The following changes since commit d0dff238a87fa81393ed72754d4dc8b09e50b08b:
>
> Merge remote-tracking branch 'remotes/juanquintela/tags/migration/20170206'
> into staging (2017-02-07 15:29:26 +0000)
>
> are available in the git repository at:
>
> git://git.linaro.org/people/pmaydell/qemu-arm.git
> tags/pull-target-arm-20170207
>
> for you to fetch changes up to 7727b832886fafbdec7299eb7773dc9071bf4cdd:
>
> stellaris: Use the 'unimplemented' device for parts we don't implement
> (2017-02-07 18:30:00 +0000)
>
> ----------------------------------------------------------------
> target-arm:
> * new "unimplemented" device for stubbing out devices in a
> system model so accesses can be logged
> * stellaris: document the SoC memory map
> * arm: create instruction syndromes for AArch32 data aborts
> * arm: Correctly handle watchpoints for BE32 CPUs
> * Fix Thumb-1 BE32 execution and disassembly
> * arm: Add cfgend parameter for ARM CPU selection
> * sd: sdhci: check data length during dma_memory_read
> * aspeed: add a watchdog controller
> * integratorcp: adding vmstate for save/restore
Clang complains about unused functions; will squash in:
diff --git a/target/arm/translate.c b/target/arm/translate.c
index a14f74c..4436d8f 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -982,7 +982,7 @@ static inline void
gen_aa32_ld##SUFF##_iss(DisasContext *s, \
TCGv_i32 a32, int index, \
ISSInfo issinfo) \
{ \
- gen_aa32_ld_i32(s, val, a32, index, OPC | s->be_data); \
+ gen_aa32_ld##SUFF(s, val, a32, index); \
disas_set_da_iss(s, OPC, issinfo); \
}
@@ -997,7 +997,7 @@ static inline void
gen_aa32_st##SUFF##_iss(DisasContext *s, \
TCGv_i32 a32, int index, \
ISSInfo issinfo) \
{ \
- gen_aa32_st_i32(s, val, a32, index, OPC | s->be_data); \
+ gen_aa32_st##SUFF(s, val, a32, index); \
disas_set_da_iss(s, OPC, issinfo | ISSIsWrite); \
}
(which avoids the problem by having the _iss() versions of the
function call the non-iss versions rather than duplicating
their function body; seems like better code anyway.)
thanks
-- PMM
- [Qemu-devel] [PULL 10/13] target/arm: A32, T32: Create Instruction Syndromes for Data Aborts, (continued)
- [Qemu-devel] [PULL 10/13] target/arm: A32, T32: Create Instruction Syndromes for Data Aborts, Peter Maydell, 2017/02/07
- [Qemu-devel] [PULL 08/13] arm: Correctly handle watchpoints for BE32 CPUs, Peter Maydell, 2017/02/07
- [Qemu-devel] [PULL 11/13] stellaris: Document memory map and which SoC devices are unimplemented, Peter Maydell, 2017/02/07
- [Qemu-devel] [PULL 06/13] target/arm: Add cfgend parameter for ARM CPU selection., Peter Maydell, 2017/02/07
- [Qemu-devel] [PULL 04/13] sd: sdhci: check data length during dma_memory_read, Peter Maydell, 2017/02/07
- [Qemu-devel] [PULL 05/13] hw/arm/integratorcp: Support specifying features via -cpu, Peter Maydell, 2017/02/07
- [Qemu-devel] [PULL 07/13] Fix Thumb-1 BE32 execution and disassembly., Peter Maydell, 2017/02/07
- [Qemu-devel] [PULL 03/13] aspeed: add a watchdog controller, Peter Maydell, 2017/02/07
- [Qemu-devel] [PULL 02/13] wdt: Add Aspeed watchdog device model, Peter Maydell, 2017/02/07
- [Qemu-devel] [PULL 01/13] integratorcp: adding vmstate for save/restore, Peter Maydell, 2017/02/07
- Re: [Qemu-devel] [PULL 00/13] target-arm queue,
Peter Maydell <=
- Re: [Qemu-devel] [PULL 00/13] target-arm queue, no-reply, 2017/02/07