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Re: [Qemu-devel] [PATCH 2/7] target-mips: generate a reserved instructio
From: |
Johnson, Eric |
Subject: |
Re: [Qemu-devel] [PATCH 2/7] target-mips: generate a reserved instruction exception on CPU without DSP |
Date: |
Wed, 21 Nov 2012 06:51:47 +0000 |
> -----Original Message-----
> From: address@hidden [mailto:qemu-devel-
> address@hidden On Behalf Of Richard Henderson
> Sent: Friday, November 16, 2012 2:03 PM
> To: Aurelien Jarno
> Cc: address@hidden
> Subject: Re: [Qemu-devel] [PATCH 2/7] target-mips: generate a reserved
> instruction exception on CPU without DSP
>
> On 11/16/2012 03:04 AM, Aurelien Jarno wrote:
> > +static inline void check_dsp(CPUMIPSState *env, DisasContext *ctx)
> > {
> > if (unlikely(!(ctx->hflags & MIPS_HFLAG_DSP))) {
> > - generate_exception(ctx, EXCP_DSPDIS);
> > + if (env->insn_flags & ASE_DSP) {
> > + generate_exception(ctx, EXCP_DSPDIS);
> > + } else {
> > + generate_exception(ctx, EXCP_RI);
> > + }
>
> Perhaps it would make more sense to copy env->insn_flags into
> a new field in DisasContext at the start of translation, rather
> than modify 300 instances to pass around a second pointer?
>
>
> r~
I agree copying insn_flags to a new field is probably a cleaner way to go.
Also minor complaints from checkpatch.pl:
$ upstream/scripts/checkpatch.pl 'patches/dsp-ase-aurelien/Qemu-devel PATCH 27
target-mips generate a reservedinstruction exception on CPU without DSP.txt'
WARNING: line over 80 characters
#54: FILE: target-mips/translate.c:2582:
+static void gen_HILO (CPUMIPSState *env, DisasContext *ctx, uint32_t opc, int
reg)
WARNING: space prohibited between function name and open parenthesis '('
#54: FILE: target-mips/translate.c:2582:
+static void gen_HILO (CPUMIPSState *env, DisasContext *ctx, uint32_t opc, int
reg)
WARNING: space prohibited between function name and open parenthesis '('
#73: FILE: target-mips/translate.c:2661:
+static void gen_muldiv (CPUMIPSState *env, DisasContext *ctx,
total: 0 errors, 3 warnings, 1825 lines checked
patches/dsp-ase-aurelien/Qemu-devel PATCH 27 target-mips generate a
reservedinstruction exception on CPU without DSP.txt has style problems, please
review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
-Eric
- [Qemu-devel] [PATCH 0/7] target-mips: DSP ASE fixes and cleanup, Aurelien Jarno, 2012/11/16
- [Qemu-devel] [PATCH 1/7] target-mips: fix DSP loads with rd = 0, Aurelien Jarno, 2012/11/16
- [Qemu-devel] [PATCH 6/7] target-mips: use DSP unions for reduction add instructions, Aurelien Jarno, 2012/11/16
- [Qemu-devel] [PATCH 3/7] target-mips: add unions to access DSP elements, Aurelien Jarno, 2012/11/16
- [Qemu-devel] [PATCH 2/7] target-mips: generate a reserved instruction exception on CPU without DSP, Aurelien Jarno, 2012/11/16
- [Qemu-devel] [PATCH 5/7] target-mips: use DSP unions for unary DSP operators, Aurelien Jarno, 2012/11/16
- [Qemu-devel] [PATCH 4/7] target-mips: use DSP unions for binary DSP operators, Aurelien Jarno, 2012/11/16
- [Qemu-devel] [PATCH 7/7] target-mips: implement DSP (d)append sub-class with TCG, Aurelien Jarno, 2012/11/16