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Re: [Qemu-devel] [PATCH] sparc: show size for unassigned accesses
From: |
Robert Reif |
Subject: |
Re: [Qemu-devel] [PATCH] sparc: show size for unassigned accesses |
Date: |
Mon, 06 Oct 2008 01:20:00 -0400 |
User-agent: |
Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.8.1.17) Gecko/20080829 SeaMonkey/1.1.12 |
Blue Swirl wrote:
On 10/2/08, Robert Reif <address@hidden> wrote:
#ifdef TARGET_SPARC
+ do_unassigned_access(addr, 0, 0, 0, 1);
+#elif defined(TARGET_CRIS)
do_unassigned_access(addr, 0, 0, 0);
+#endif
+ return 0;
I think it would be cleaner solution to convert also CRIS and MIPS
versions to take the size argument.
Index: target-cris/cpu.h
===================================================================
--- target-cris/cpu.h (revision 5430)
+++ target-cris/cpu.h (working copy)
@@ -168,7 +168,7 @@
int cpu_cris_signal_handler(int host_signum, void *pinfo,
void *puc);
void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
- int is_asi);
+ int is_asi, int size);
enum {
CC_OP_DYNAMIC, /* Use env->cc_op */
Index: target-cris/op_helper.c
===================================================================
--- target-cris/op_helper.c (revision 5430)
+++ target-cris/op_helper.c (working copy)
@@ -237,10 +237,10 @@
}
void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
- int is_asi)
+ int is_asi, int size)
{
- D(printf("%s addr=%x w=%d ex=%d asi=%d\n",
- __func__, addr, is_write, is_exec, is_asi));
+ D(printf("%s addr=%x w=%d ex=%d asi=%d, size=%d\n",
+ __func__, addr, is_write, is_exec, is_asi, size));
}
static void evaluate_flags_writeback(uint32_t flags)
Index: target-sparc/cpu.h
===================================================================
--- target-sparc/cpu.h (revision 5430)
+++ target-sparc/cpu.h (working copy)
@@ -430,7 +430,7 @@
/* cpu-exec.c */
void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
- int is_asi);
+ int is_asi, int size);
int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc);
#define CPUState CPUSPARCState
Index: target-sparc/op_helper.c
===================================================================
--- target-sparc/op_helper.c (revision 5430)
+++ target-sparc/op_helper.c (working copy)
@@ -950,7 +950,7 @@
break;
case 8: /* User code access, XXX */
default:
- do_unassigned_access(addr, 0, 0, asi);
+ do_unassigned_access(addr, 0, 0, asi, size);
ret = 0;
break;
}
@@ -1284,7 +1284,7 @@
case 8: /* User code access, XXX */
case 9: /* Supervisor code access, XXX */
default:
- do_unassigned_access(addr, 1, 0, asi);
+ do_unassigned_access(addr, 1, 0, asi, size);
break;
}
#ifdef DEBUG_ASI
@@ -1464,7 +1464,7 @@
case 0x8a: // Primary no-fault LE, RO
case 0x8b: // Secondary no-fault LE, RO
default:
- do_unassigned_access(addr, 1, 0, 1);
+ do_unassigned_access(addr, 1, 0, 1, size);
return;
}
}
@@ -1675,7 +1675,7 @@
case 0x5f: // D-MMU demap, WO
case 0x77: // Interrupt vector, WO
default:
- do_unassigned_access(addr, 0, 0, 1);
+ do_unassigned_access(addr, 0, 0, 1, size);
ret = 0;
break;
}
@@ -2082,7 +2082,7 @@
case 0x8a: // Primary no-fault LE, RO
case 0x8b: // Secondary no-fault LE, RO
default:
- do_unassigned_access(addr, 1, 0, 1);
+ do_unassigned_access(addr, 1, 0, 1, size);
return;
}
}
@@ -3025,7 +3025,7 @@
#ifndef TARGET_SPARC64
void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
- int is_asi)
+ int is_asi, int size)
{
CPUState *saved_env;
@@ -3035,14 +3035,15 @@
env = cpu_single_env;
#ifdef DEBUG_UNASSIGNED
if (is_asi)
- printf("Unassigned mem %s access to " TARGET_FMT_plx
+ printf("Unassigned mem %s access of %d byte%s to " TARGET_FMT_plx
" asi 0x%02x from " TARGET_FMT_lx "\n",
- is_exec ? "exec" : is_write ? "write" : "read", addr, is_asi,
- env->pc);
+ is_exec ? "exec" : is_write ? "write" : "read", size,
+ size == 1 ? "" : "s", addr, is_asi, env->pc);
else
- printf("Unassigned mem %s access to " TARGET_FMT_plx " from "
- TARGET_FMT_lx "\n",
- is_exec ? "exec" : is_write ? "write" : "read", addr, env->pc);
+ printf("Unassigned mem %s access of %d byte%s to " TARGET_FMT_plx
+ " from " TARGET_FMT_lx "\n",
+ is_exec ? "exec" : is_write ? "write" : "read", size,
+ size == 1 ? "" : "s", addr, env->pc);
#endif
if (env->mmuregs[3]) /* Fault status register */
env->mmuregs[3] = 1; /* overflow (not read before another fault) */
@@ -3066,7 +3067,7 @@
}
#else
void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
- int is_asi)
+ int is_asi, int size)
{
#ifdef DEBUG_UNASSIGNED
CPUState *saved_env;
Index: target-mips/cpu.h
===================================================================
--- target-mips/cpu.h (revision 5430)
+++ target-mips/cpu.h (working copy)
@@ -470,7 +470,7 @@
void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt,
...));
void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
- int unused);
+ int unused, int size);
#define CPUState CPUMIPSState
#define cpu_init cpu_mips_init
Index: target-mips/op_helper.c
===================================================================
--- target-mips/op_helper.c (revision 5430)
+++ target-mips/op_helper.c (working copy)
@@ -1911,7 +1911,7 @@
}
void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
- int unused)
+ int unused, int size)
{
if (is_exec)
do_raise_exception(EXCP_IBE);
Index: exec.c
===================================================================
--- exec.c (revision 5430)
+++ exec.c (working copy)
@@ -2289,36 +2289,74 @@
#ifdef DEBUG_UNASSIGNED
printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
#endif
-#ifdef TARGET_SPARC
- do_unassigned_access(addr, 0, 0, 0);
-#elif defined(TARGET_CRIS)
- do_unassigned_access(addr, 0, 0, 0);
+#if defined(TARGET_SPARC) || defined(TARGET_CRIS)
+ do_unassigned_access(addr, 0, 0, 0, 1);
#endif
return 0;
}
+static uint32_t unassigned_mem_readw(void *opaque, target_phys_addr_t addr)
+{
+#ifdef DEBUG_UNASSIGNED
+ printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
+#endif
+#if defined(TARGET_SPARC) || defined(TARGET_CRIS)
+ do_unassigned_access(addr, 0, 0, 0, 2);
+#endif
+ return 0;
+}
+
+static uint32_t unassigned_mem_readl(void *opaque, target_phys_addr_t addr)
+{
+#ifdef DEBUG_UNASSIGNED
+ printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
+#endif
+#if defined(TARGET_SPARC) || defined(TARGET_CRIS)
+ do_unassigned_access(addr, 0, 0, 0, 4);
+#endif
+ return 0;
+}
+
static void unassigned_mem_writeb(void *opaque, target_phys_addr_t addr,
uint32_t val)
{
#ifdef DEBUG_UNASSIGNED
printf("Unassigned mem write " TARGET_FMT_plx " = 0x%x\n", addr, val);
#endif
-#ifdef TARGET_SPARC
- do_unassigned_access(addr, 1, 0, 0);
-#elif defined(TARGET_CRIS)
- do_unassigned_access(addr, 1, 0, 0);
+#if defined(TARGET_SPARC) || defined(TARGET_CRIS)
+ do_unassigned_access(addr, 1, 0, 0, 1);
#endif
}
+static void unassigned_mem_writew(void *opaque, target_phys_addr_t addr,
uint32_t val)
+{
+#ifdef DEBUG_UNASSIGNED
+ printf("Unassigned mem write " TARGET_FMT_plx " = 0x%x\n", addr, val);
+#endif
+#if defined(TARGET_SPARC) || defined(TARGET_CRIS)
+ do_unassigned_access(addr, 1, 0, 0, 2);
+#endif
+}
+
+static void unassigned_mem_writel(void *opaque, target_phys_addr_t addr,
uint32_t val)
+{
+#ifdef DEBUG_UNASSIGNED
+ printf("Unassigned mem write " TARGET_FMT_plx " = 0x%x\n", addr, val);
+#endif
+#if defined(TARGET_SPARC) || defined(TARGET_CRIS)
+ do_unassigned_access(addr, 1, 0, 0, 4);
+#endif
+}
+
static CPUReadMemoryFunc *unassigned_mem_read[3] = {
unassigned_mem_readb,
- unassigned_mem_readb,
- unassigned_mem_readb,
+ unassigned_mem_readw,
+ unassigned_mem_readl,
};
static CPUWriteMemoryFunc *unassigned_mem_write[3] = {
unassigned_mem_writeb,
- unassigned_mem_writeb,
- unassigned_mem_writeb,
+ unassigned_mem_writew,
+ unassigned_mem_writel,
};
static void notdirty_mem_writeb(void *opaque, target_phys_addr_t ram_addr,
Index: exec-all.h
===================================================================
--- exec-all.h (revision 5430)
+++ exec-all.h (working copy)
@@ -331,7 +331,7 @@
pd = env1->tlb_table[mmu_idx][page_index].addr_code & ~TARGET_PAGE_MASK;
if (pd > IO_MEM_ROM && !(pd & IO_MEM_ROMD)) {
#if defined(TARGET_SPARC) || defined(TARGET_MIPS)
- do_unassigned_access(addr, 0, 1, 0);
+ do_unassigned_access(addr, 0, 1, 0, 4);
#else
cpu_abort(env1, "Trying to execute code outside RAM or ROM at 0x"
TARGET_FMT_lx "\n", addr);
#endif