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Re: [Discuss-gnuradio] saturation with multi_fft.py


From: ematlis
Subject: Re: [Discuss-gnuradio] saturation with multi_fft.py
Date: Tue, 9 Oct 2007 09:11:31 -0400 (EDT)

Actually no, I want the code that enables a single usrp to receive signals on two daughterboards. Sorry about the confusion on that; I assumed the "multi" in the filenames was referring to multiple daughterboards, I had forgotten there's a multi-usrp capability as well.

So, with that cleared up, can you verify which file specifically I should load into Quartus? There is only one usrp_std.qpf project file in

usrp/fpga/toplevel/usrp_std

so it is unclear to me how to compile for the two-daughter board case as opposed to the single. Do I need to configure something in the project file for the two-daughterboard case?

thanks,
eric

p.s.- on a positive note, at least my efforts to date have revealed what updates the multi_usrp.qsf file needs to compile!

On Mon, 8 Oct 2007, Eric Blossom wrote:

On Tue, Oct 09, 2007 at 12:05:08AM -0400, address@hidden wrote:
Your suggestion worked to fix the compilation problem, along with the
addition of a line for atr_delay.v, however, I'm not able to load the
newly compiled rbf file into the usrp, and the error leads me to believe I
need to take a step back and make sure I'm working with the right files.

When I copied the newly compiled usrp_multi.rbf to
share/usrp/rev2/, I get the following error with the
verbose environment variable turned on:

usrp: firmware ...share/usrp/rev2/std.ihx loaded successfully.
Can't find fpga bitstream: multi_usrp_test.rbf

even though I specified the name "multi_usrp_test.rbf" in the python code.

So on a hunch I changed the name of the rbf file to std_4rx_0tx.rbf,
adjusted my python code appropriatly, and now it loads but I get the
following:

usrp: firmware .../share/usrp/rev2/std.ihx loaded successfully.
usrp: fpga bitstream ...share/usrp/rev2/std_4rx_0tx.rbf loaded successfully.
This code requires an FPGA build with 4 DDCs.  This FPGA has only 2.

This would indicate that you didn't build what you think you did (or
that the code that initializes that register value is hosed).
The host reads back a register from the FPGA image to get the answer
to number DDCs and DUCs.  I suspect that you may have copied the wrong
rbf to the wrong place, or something similar.

So now my question is, to test the multiple receive capability of the
usrp,

Just to be clear, I think that you mean that you want to use multiple
USRPs to receive multiple signals, NOT a single USRP with two
daughterboards to receive multiple signals.  Do I understand you correctly?

exactly which project file (in which directory) do I need to load
into Quartus, do I need to modify it to enable 4 receive ddc's, and once
it compiles, what do I do with it?  Where do I put it and how do I name
it?  Why does it need to be named exactly one way and not another?

The project file for the multi-usrp stuff is in
usrp/fpga/toplevel/usrp_multi

You need to copy the resulting .rbf file into
.../share/usrp/rev{2,4}/multi_4rx_0tx.rbf (or whatever you want to call it)

Then you need to ensure that you are specifying that filename in the
USRP constructor.  E.g.,

 u = usrp.source_c(0, decim, fpga_firmware="multi_4rx_0tx.rbf")

I'm assuming that you have looked at the code in
gnuradio-examples/python/multi_usrp/*

I'm not exactly sure of that status of that code.
Martin DVH would be the one to ask.

Eric





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