[Discuss-gnuradio] PSK31, Auto T/R switching

[Eric Blossom]

On Fri, Nov 18, 2005 at 10:44:45PM -0800, Eric Blossom wrote:

> > That looks like a giant step toward getting my ham bpsk (psk31)
> > project revived.  I can now get a stream from the beginning and
> > actual text across now - just need to redo my "stuff the pipe with
> > nulls when the user isn't typing" scheme.

You might want to consider just getting a whole line from the user in
python, using either readline (free editing and history support), or a
GUI, then once you've got a whole line collected, turn on the external
Tx and send the whole line down for transmission using the new
gr.message_source block and gr.message's.  That way you don't have to
idle with Tx on while you're typing.  Take a look at
gnuradio-example/python/gmsk2 for examples.  [Fine point: for
discontinous transmission to work properly you need to ensure that the
blob of data sent to the usrp ends up padded to a multiple of 128
samples.  This jibes with the 512-byte USB transfer size...]

In related news...

Matt's currently working on an "automatic transmit/receive switching"
mode for the USRP.  It's an optional feature that we plan to use with
a bunch of the daughterboards.  Depending on whether there's data in
the FPGA transmit fifo or not, specified daughterboard pins
automatically change state.  We'll build a high level interface to it,
but the register layout is most likely going to look like this (from
fpga_regs_standard.h):

Eric


// ------------------------------------------------------------------------
// Automatic Transmit/Receive switching
//

// If automatic transmit/receive (ATR) switching is enabled in the
// FR_ATR_CTL register, the presence or absence of data in the FPGA
// transmit fifo selects between two sets of values for each of the 4
// banks of daughterboard i/o pins.
//
// Each daughterboard slot has 3 16-bit registers associated with it:
//   FR_ATR_MASK_*, FR_ATR_TXVAL_* and FR_ATR_RXVAL_*
//
// FR_ATR_MASK_{0,1,2,3}: 
//
//   These registers determine which of the daugherboard i/o pins are
//   affected by ATR switching.  If a bit in the mask is set, the
//   corresponding i/o bit is controlled by ATR, else it's output
//   value comes from the normal i/o pin output register:
//   FR_IO_{0,1,2,3}.
//
// FR_ATR_TXVAL_{0,1,2,3}:
// FR_ATR_RXVAL_{0,1,2,3}:
//
//   If the Tx fifo contains data, then the bits from TXVAL that are
//   selected by MASK are output.  Otherwise, the bits from RXVAL that
//   are selected by MASK are output.
                      

#define FR_ATR_MASK_0           55      // slot 0
#define FR_ATR_TXVAL_0          56
#define FR_ATR_RXVAL_0          57

#define FR_ATR_MASK_1           58      // slot 1
#define FR_ATR_TXVAL_1          59
#define FR_ATR_RXVAL_1          60

#define FR_ATR_MASK_2           61      // slot 2
#define FR_ATR_TXVAL_2          62
#define FR_ATR_RXVAL_3          63

#define FR_ATR_MASK_4           64      // slot 3
#define FR_ATR_TXVAL_4          65
#define FR_ATR_RXVAL_4          66

// Auto Transmit/Receive Control Register
//
//    3                   2                   1                       
//  1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
// +-------------------------------------------------------------+-+
// |                      Reserved (Must be zero)                |E|
// +-------------------------------------------------------------+-+
//

#define FR_ATR_CTL              67
#  define bmFR_ATR_CTL_EN               (1 <<  0)