Anyone have thoughts on why I can set an output pin, jam data into the SPDR, and clear the output pin on interrupt on a Mega644 (on the 8MHz internal clock (SPI at clk/2)), and it takes 7uS, but if I do the same with a wait loop instead of the interrupt, it takes
3.5uS? It's almost exactly double on a 'scope. Theoretically, one would expect it to take 2.5uS either way (8MHz/2/8bits + 4 instr to twiddle port pin). I can see my clock output pin, and it is in the neighborhood of 8MHz (and serial comm works), so I expect the clock is right. I would guess the extra
1.5uS in polled mode comes from tweaking the PORT pin and the while loop (even though it still seems 1uS too long), so my only real question is, why the 7uS on the interrupt? In the real world, this means an AVR can only transfer about 100kB/s over the SPI interrupted, a respectable amount, but rules out alot of things (
i.e. audio if you need to do more than just push the data) (no wonder I keep making SPI to parallel coverters out of CPLD's [especially for 16-bit and 24-bit ADC's])...