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[PATCH v7 16/23] hw/riscv: virt: Use AIA INTC compatible string when ava
From: |
Anup Patel |
Subject: |
[PATCH v7 16/23] hw/riscv: virt: Use AIA INTC compatible string when available |
Date: |
Mon, 17 Jan 2022 18:58:19 +0530 |
From: Anup Patel <anup.patel@wdc.com>
We should use the AIA INTC compatible string in the CPU INTC
DT nodes when the CPUs support AIA feature. This will allow
Linux INTC driver to use AIA local interrupt CSRs.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
---
hw/riscv/virt.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 3af074148e..720641b1dd 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -211,8 +211,17 @@ static void create_fdt_socket_cpus(RISCVVirtState *s, int
socket,
qemu_fdt_add_subnode(mc->fdt, intc_name);
qemu_fdt_setprop_cell(mc->fdt, intc_name, "phandle",
intc_phandles[cpu]);
- qemu_fdt_setprop_string(mc->fdt, intc_name, "compatible",
- "riscv,cpu-intc");
+ if (riscv_feature(&s->soc[socket].harts[cpu].env,
+ RISCV_FEATURE_AIA)) {
+ static const char * const compat[2] = {
+ "riscv,cpu-intc-aia", "riscv,cpu-intc"
+ };
+ qemu_fdt_setprop_string_array(mc->fdt, intc_name, "compatible",
+ (char **)&compat, ARRAY_SIZE(compat));
+ } else {
+ qemu_fdt_setprop_string(mc->fdt, intc_name, "compatible",
+ "riscv,cpu-intc");
+ }
qemu_fdt_setprop(mc->fdt, intc_name, "interrupt-controller", NULL, 0);
qemu_fdt_setprop_cell(mc->fdt, intc_name, "#interrupt-cells", 1);
--
2.25.1
- [PATCH v7 12/23] target/riscv: Implement AIA interrupt filtering CSRs, (continued)
- [PATCH v7 12/23] target/riscv: Implement AIA interrupt filtering CSRs, Anup Patel, 2022/01/17
- [PATCH v7 13/23] target/riscv: Implement AIA mtopi, stopi, and vstopi CSRs, Anup Patel, 2022/01/17
- [PATCH v7 11/23] target/riscv: Implement AIA hvictl and hviprioX CSRs, Anup Patel, 2022/01/17
- [PATCH v7 10/23] target/riscv: Implement AIA CSRs for 64 local interrupts on RV32, Anup Patel, 2022/01/17
- [PATCH v7 15/23] target/riscv: Implement AIA IMSIC interface CSRs, Anup Patel, 2022/01/17
- [PATCH v7 09/23] target/riscv: Implement AIA local interrupt priorities, Anup Patel, 2022/01/17
- [PATCH v7 16/23] hw/riscv: virt: Use AIA INTC compatible string when available,
Anup Patel <=
- [PATCH v7 08/23] target/riscv: Allow AIA device emulation to set ireg rmw callback, Anup Patel, 2022/01/17
- [PATCH v7 07/23] target/riscv: Add defines for AIA CSRs, Anup Patel, 2022/01/17
- [PATCH v7 17/23] target/riscv: Allow users to force enable AIA CSRs in HART, Anup Patel, 2022/01/17
- [PATCH v7 19/23] hw/riscv: virt: Add optional AIA APLIC support to virt machine, Anup Patel, 2022/01/17
- [PATCH v7 05/23] target/riscv: Allow setting CPU feature from machine/device emulation, Anup Patel, 2022/01/17
- [PATCH v7 18/23] hw/intc: Add RISC-V AIA APLIC device emulation, Anup Patel, 2022/01/17
- [PATCH v7 22/23] docs/system: riscv: Document AIA options for virt machine, Anup Patel, 2022/01/17
- [PATCH v7 21/23] hw/riscv: virt: Add optional AIA IMSIC support to virt machine, Anup Patel, 2022/01/17
- [PATCH v7 23/23] hw/riscv: virt: Increase maximum number of allowed CPUs, Anup Patel, 2022/01/17