Re: [PATCH v3 09/20] target/riscv: Alloc tcg global for cur

qemu-riscv

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Re: [PATCH v3 09/20] target/riscv: Alloc tcg global for cur_pm[mask|base

From:	Richard Henderson
Subject:	Re: [PATCH v3 09/20] target/riscv: Alloc tcg global for cur_pm[mask\|base]
Date:	Thu, 11 Nov 2021 12:26:58 +0100
User-agent:	Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0

On 11/11/21 6:57 AM, LIU Zhiwei wrote:

Replace the array of pm_mask/pm_base with scalar variables.
Remove the cached array value in DisasContext.

Signed-off-by: LIU Zhiwei<zhiwei_liu@c-sky.com>
---
  target/riscv/translate.c | 32 ++++++++------------------------
  1 file changed, 8 insertions(+), 24 deletions(-)


Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

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[PATCH v3 02/20] target/riscv: Sign extend pc for different XLEN, (continued)
- [PATCH v3 02/20] target/riscv: Sign extend pc for different XLEN, LIU Zhiwei, 2021/11/11
- [PATCH v3 03/20] target/riscv: Ignore the pc bits above XLEN, LIU Zhiwei, 2021/11/11
- [PATCH v3 04/20] target/riscv: Extend pc for runtime pc write, LIU Zhiwei, 2021/11/11
  - Re: [PATCH v3 04/20] target/riscv: Extend pc for runtime pc write, Richard Henderson, 2021/11/11
- [PATCH v3 05/20] target/riscv: Use gdb xml according to max mxlen, LIU Zhiwei, 2021/11/11
- [PATCH v3 06/20] target/riscv: Relax debug check for pm write, LIU Zhiwei, 2021/11/11
- [PATCH v3 07/20] target/riscv: Adjust csr write mask with XLEN, LIU Zhiwei, 2021/11/11
  - Re: [PATCH v3 07/20] target/riscv: Adjust csr write mask with XLEN, Richard Henderson, 2021/11/11
- [PATCH v3 08/20] target/riscv: Create current pm fields in env, LIU Zhiwei, 2021/11/11
- [PATCH v3 09/20] target/riscv: Alloc tcg global for cur_pm[mask|base], LIU Zhiwei, 2021/11/11
  - Re: [PATCH v3 09/20] target/riscv: Alloc tcg global for cur_pm[mask|base], Richard Henderson <=
- [PATCH v3 10/20] target/riscv: Calculate address according to XLEN, LIU Zhiwei, 2021/11/11
  - Re: [PATCH v3 10/20] target/riscv: Calculate address according to XLEN, Richard Henderson, 2021/11/11
- [PATCH v3 11/20] target/riscv: Split pm_enabled into mask and base, LIU Zhiwei, 2021/11/11
  - Re: [PATCH v3 11/20] target/riscv: Split pm_enabled into mask and base, Richard Henderson, 2021/11/11
- [PATCH v3 12/20] target/riscv: Split out the vill from vtype, LIU Zhiwei, 2021/11/11
  - Re: [PATCH v3 12/20] target/riscv: Split out the vill from vtype, Richard Henderson, 2021/11/11
- [PATCH v3 13/20] target/riscv: Fix RESERVED field length in VTYPE, LIU Zhiwei, 2021/11/11
  - Re: [PATCH v3 13/20] target/riscv: Fix RESERVED field length in VTYPE, Richard Henderson, 2021/11/11
    - Re: [PATCH v3 13/20] target/riscv: Fix RESERVED field length in VTYPE, Richard Henderson, 2021/11/11
- [PATCH v3 14/20] target/riscv: Adjust vsetvl according to XLEN, LIU Zhiwei, 2021/11/11

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