Re: [PATCH v3 12/20] target/riscv: Split out the vill from vtype

[Richard Henderson]

On 11/11/21 6:57 AM, LIU Zhiwei wrote:
> We need not specially process vtype when XLEN changes.
>
> Signed-off-by: LIU Zhiwei<zhiwei_liu@c-sky.com>
> ---
>   target/riscv/cpu.h           |  1 +
>   target/riscv/cpu_helper.c    |  3 +--
>   target/riscv/csr.c           | 13 ++++++++++++-
>   target/riscv/machine.c       |  1 +
>   target/riscv/vector_helper.c |  3 ++-
>   5 files changed, 17 insertions(+), 4 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


> @@ -104,6 +104,7 @@ static const VMStateDescription vmstate_vector = {
>              VMSTATE_UINTTL(env.vl, RISCVCPU),
>              VMSTATE_UINTTL(env.vstart, RISCVCPU),
>              VMSTATE_UINTTL(env.vtype, RISCVCPU),
> +            VMSTATE_BOOL(env.vill, RISCVCPU),
>              VMSTATE_END_OF_LIST()

Need to bump version.


r~