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[PATCH v2 5/7] riscv/virt: Manually define the machine
From: |
Alistair Francis |
Subject: |
[PATCH v2 5/7] riscv/virt: Manually define the machine |
Date: |
Thu, 26 Sep 2019 17:44:31 -0700 |
Instead of using the DEFINE_MACHINE() macro to define the machine let's
do it manually. This allows us to use the machine object to create
RISCVVirtState. This is required to add children and aliases to the
machine.
This patch is no functional change.
Signed-off-by: Alistair Francis <address@hidden>
---
hw/riscv/virt.c | 30 ++++++++++++++++++++++++------
include/hw/riscv/virt.h | 7 ++++++-
2 files changed, 30 insertions(+), 7 deletions(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index d36f5625ec..e4dcbadcb5 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -362,8 +362,7 @@ static inline DeviceState *gpex_pcie_init(MemoryRegion
*sys_mem,
static void riscv_virt_board_init(MachineState *machine)
{
const struct MemmapEntry *memmap = virt_memmap;
-
- RISCVVirtState *s = g_new0(RISCVVirtState, 1);
+ RISCVVirtState *s = RISCV_VIRT_MACHINE(machine);
MemoryRegion *system_memory = get_system_memory();
MemoryRegion *main_mem = g_new(MemoryRegion, 1);
MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
@@ -499,12 +498,31 @@ static void riscv_virt_board_init(MachineState *machine)
g_free(plic_hart_config);
}
-static void riscv_virt_board_machine_init(MachineClass *mc)
+static void riscv_virt_machine_instance_init(Object *obj)
{
- mc->desc = "RISC-V VirtIO Board (Privileged ISA v1.10)";
+}
+
+static void riscv_virt_machine_class_init(ObjectClass *oc, void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+
+ mc->desc = "RISC-V VirtIO board";
mc->init = riscv_virt_board_init;
- mc->max_cpus = 8; /* hardcoded limit in BBL */
+ mc->max_cpus = 8;
mc->default_cpu_type = VIRT_CPU;
}
-DEFINE_MACHINE("virt", riscv_virt_board_machine_init)
+static const TypeInfo riscv_virt_machine_typeinfo = {
+ .name = MACHINE_TYPE_NAME("virt"),
+ .parent = TYPE_MACHINE,
+ .class_init = riscv_virt_machine_class_init,
+ .instance_init = riscv_virt_machine_instance_init,
+ .instance_size = sizeof(RISCVVirtState),
+};
+
+static void riscv_virt_machine_init_register_types(void)
+{
+ type_register_static(&riscv_virt_machine_typeinfo);
+}
+
+type_init(riscv_virt_machine_init_register_types)
diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h
index 6e5fbe5d3b..ffcdcc6dcc 100644
--- a/include/hw/riscv/virt.h
+++ b/include/hw/riscv/virt.h
@@ -22,13 +22,18 @@
#include "hw/riscv/riscv_hart.h"
#include "hw/sysbus.h"
+#define TYPE_RISCV_VIRT_MACHINE MACHINE_TYPE_NAME("virt")
+#define RISCV_VIRT_MACHINE(obj) \
+ OBJECT_CHECK(RISCVVirtState, (obj), TYPE_RISCV_VIRT_MACHINE)
+
typedef struct {
/*< private >*/
- SysBusDevice parent_obj;
+ MachineState parent;
/*< public >*/
RISCVHartArrayState soc;
DeviceState *plic;
+
void *fdt;
int fdt_size;
} RISCVVirtState;
--
2.23.0
- [PATCH v2 0/7] RISC-V: Add more machine memory, Alistair Francis, 2019/09/26
- [PATCH v2 2/7] riscv/sifive_u: Add QSPI memory region, Alistair Francis, 2019/09/26
- [PATCH v2 1/7] riscv/sifive_u: Add L2-LIM cache memory, Alistair Francis, 2019/09/26
- [PATCH v2 3/7] riscv/sifive_u: Manually define the machine, Alistair Francis, 2019/09/26
- [PATCH v2 5/7] riscv/virt: Manually define the machine,
Alistair Francis <=
- [PATCH v2 4/7] riscv/sifive_u: Add the start-in-flash property, Alistair Francis, 2019/09/26
- [PATCH v2 7/7] riscv/virt: Jump to pflash if specified, Alistair Francis, 2019/09/26
- [PATCH v2 6/7] riscv/virt: Add the PFlash CFI01 device, Alistair Francis, 2019/09/26