Re: [RFC PATCH 0/7] VSX MMA Implementation

[Lucas Mateus Martins Araujo e Castro]

Something I forgot to mention in the cover letter, the XVFGER instructions accumulate the exception status and at the end set the FPSCR and take a Program interrupt on a trap-enabled exception, but as the exception functions are currently set up in target/ppc/fpu_helper.c a call to set a FPSCR bit could raise an exception before all bits could be set.

Victor (CCing him) is working on a patch series to fix the FPSCR.FI bit that will reorganize do_float_check_status (that would solve the aforementioned problem), so for now I sent without trying to solve that problem

In v2 I'll remember to mention this in the cover letter

    On 26/04/2022 09:50, Lucas Mateus Castro(alqotel) wrote:
> From: "Lucas Mateus Castro (alqotel)" <lucas.araujo@eldorado.org.br>
>
> This patch series is an RFC of the Matrix-Multiply Assist (MMA)
> instructions implementation from the PowerISA 3.1 
>
> These and the VDIV/VMOD implementation are the last new PowerISA 3.1
> instructions left to be implemented.
>
> Thanks
> Lucas Mateus Castro (alqotel) (7):
>   target/ppc: Implement xxm[tf]acc and xxsetaccz
>   target/ppc: Implemented xvi*ger* instructions
>   target/ppc: Implemented pmxvi*ger* instructions
>   target/ppc: Implemented xvf*ger*
>   target/ppc: Implemented xvf16ger*
>   target/ppc: Implemented pmxvf*ger*
>   target/ppc: Implemented [pm]xvbf16ger2*
>
>  include/fpu/softfloat.h             |   9 ++
>  target/ppc/cpu.h                    |  15 +++
>  target/ppc/fpu_helper.c             | 130 ++++++++++++++++++
>  target/ppc/helper.h                 |   7 +
>  target/ppc/insn32.decode            |  49 +++++++
>  target/ppc/insn64.decode            |  80 +++++++++++
>  target/ppc/int_helper.c             |  85 ++++++++++++
>  target/ppc/internal.h               |  28 ++++
>  target/ppc/translate/vsx-impl.c.inc | 200 ++++++++++++++++++++++++++++
>  9 files changed, 603 insertions(+)
>
>

--
Lucas Mateus M. Araujo e Castro
Instituto de Pesquisas ELDORADO
Departamento Computação Embarcada
Analista de Software Trainee
Aviso Legal - Disclaimer