[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 17/88] ppc/xive: Record the IPB in the associated NVT
From: |
David Gibson |
Subject: |
[PULL 17/88] ppc/xive: Record the IPB in the associated NVT |
Date: |
Tue, 17 Dec 2019 15:42:11 +1100 |
From: Cédric Le Goater <address@hidden>
When an interrupt can not be presented to a vCPU, because it is not
running on any of the HW treads, the XIVE presenter updates the
Interrupt Pending Buffer register of the associated XIVE NVT
structure. This is only done if backlog is activated in the END but
this is generally the case.
The current code assumes that the fields of the NVT structure is
architected with the same layout of the thread interrupt context
registers. Fix this assumption and define an offset for the IPB
register backup value in the NVT.
Signed-off-by: Cédric Le Goater <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Greg Kurz <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/intc/xive.c | 11 +++++++++--
include/hw/ppc/xive_regs.h | 1 +
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index 3d472e29c8..177663d2b4 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -1607,14 +1607,21 @@ static void xive_router_end_notify(XiveRouter *xrtr,
uint8_t end_blk,
* - logical server : forward request to IVPE (not supported)
*/
if (xive_end_is_backlog(&end)) {
+ uint8_t ipb;
+
if (format == 1) {
qemu_log_mask(LOG_GUEST_ERROR,
"XIVE: END %x/%x invalid config: F1 & backlog\n",
end_blk, end_idx);
return;
}
- /* Record the IPB in the associated NVT structure */
- ipb_update((uint8_t *) &nvt.w4, priority);
+ /*
+ * Record the IPB in the associated NVT structure for later
+ * use. The presenter will resend the interrupt when the vCPU
+ * is dispatched again on a HW thread.
+ */
+ ipb = xive_get_field32(NVT_W4_IPB, nvt.w4) | priority_to_ipb(priority);
+ nvt.w4 = xive_set_field32(NVT_W4_IPB, nvt.w4, ipb);
xive_router_write_nvt(xrtr, nvt_blk, nvt_idx, &nvt, 4);
/*
diff --git a/include/hw/ppc/xive_regs.h b/include/hw/ppc/xive_regs.h
index 55307cd153..530f232b04 100644
--- a/include/hw/ppc/xive_regs.h
+++ b/include/hw/ppc/xive_regs.h
@@ -255,6 +255,7 @@ typedef struct XiveNVT {
uint32_t w2;
uint32_t w3;
uint32_t w4;
+#define NVT_W4_IPB PPC_BITMASK32(16, 23)
uint32_t w5;
uint32_t w6;
uint32_t w7;
--
2.23.0
- [PULL 07/88] ppc/pnv: Link "psi" property to PnvLpc::psi pointer, (continued)
- [PULL 07/88] ppc/pnv: Link "psi" property to PnvLpc::psi pointer, David Gibson, 2019/12/16
- [PULL 08/88] ppc/pnv: Link "psi" property to PnvOCC::psi pointer, David Gibson, 2019/12/16
- [PULL 19/88] ppc/pnv: Remove pnv_xive_vst_size() routine, David Gibson, 2019/12/16
- [PULL 15/88] spapr: Abort if XICS interrupt controller cannot be initialized, David Gibson, 2019/12/16
- [PULL 20/88] xive/kvm: Trigger interrupts from userspace, David Gibson, 2019/12/16
- [PULL 18/88] ppc/xive: Introduce helpers for the NVT id, David Gibson, 2019/12/16
- [PULL 16/88] ppc/pnv: Add a LPC "ranges" property, David Gibson, 2019/12/16
- [PULL 14/88] xics: Link ICP_PROP_CPU property to ICPState::cs pointer, David Gibson, 2019/12/16
- [PULL 23/88] ppc/xive: Check V bit in TM_PULL_POOL_CTX, David Gibson, 2019/12/16
- [PULL 13/88] xics: Link ICP_PROP_XICS property to ICPState::xics pointer, David Gibson, 2019/12/16
- [PULL 17/88] ppc/xive: Record the IPB in the associated NVT,
David Gibson <=
- [PULL 27/88] ppc/xive: Introduce a XivePresenter interface, David Gibson, 2019/12/16
- [PULL 26/88] ppc/pnv: Create BMC devices at machine init, David Gibson, 2019/12/16
- [PULL 28/88] ppc/xive: Implement the XivePresenter interface, David Gibson, 2019/12/16
- [PULL 21/88] ppc/pnv: Quiesce some XIVE errors, David Gibson, 2019/12/16
- [PULL 22/88] ppc/xive: Introduce OS CAM line helpers, David Gibson, 2019/12/16
- [PULL 24/88] ipmi: Add support to customize OEM functions, David Gibson, 2019/12/16
- [PULL 36/88] ppc/spapr: Implement the XiveFabric interface, David Gibson, 2019/12/16
- [PULL 25/88] ppc/pnv: Add HIOMAP commands, David Gibson, 2019/12/16
- [PULL 34/88] ppc/xive: Introduce a XiveFabric interface, David Gibson, 2019/12/16
- [PULL 30/88] ppc/pnv: Loop on the threads of the chip to find a matching NVT, David Gibson, 2019/12/16