[Top][All Lists]

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-ppc] [RFC PATCH 0/6] target/ppc: convert VMX instructions to u

From: BALATON Zoltan
Subject: Re: [Qemu-ppc] [RFC PATCH 0/6] target/ppc: convert VMX instructions to use TCG vector operations
Date: Mon, 10 Dec 2018 01:33:53 +0100 (CET)
User-agent: Alpine 2.21.9999 (BSF 287 2018-06-16)

On Fri, 7 Dec 2018, Mark Cave-Ayland wrote:
This patchset is an attempt at trying to improve the VMX (Altivec) instruction
performance by making use of the new TCG vector operations where possible.

This is very welcome, thanks for doing this.

In order to use TCG vector operations, the registers must be accessible from 
whilst currently they are accessed via arrays of static TCG globals. Patches 1-3
are therefore mechanical patches which introduce access helpers for FPR, AVR 
and VSR
registers using the supplied TCGv_i64 parameter.

Have you tried some benchmarks or tests to measure the impact of these changes? I've tried the (very unscientific) benchmarks I've written about before here:


(which seem to use AltiVec/VMX instructions but not sure which) on mac99 with MorphOS and I could not see any performance increase. I haven't run enough tests but results with or without this series on master were mostly the same within a few percents, and sometimes even seen lower performance with these patches than without. I haven't tried to find out why (no time for that now) so can't really draw any conclusions from this. I'm also not sure if I've actually tested what you've changed or these use instructions that your patches don't optimise yet, or the changes I've seen were just normal changes between runs; but I wonder if the increased number of temporaries could result in lower performance in some cases?


reply via email to

[Prev in Thread] Current Thread [Next in Thread]