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[Qemu-ppc] [PULL 18/47] spapr: move the IRQ server number mapping under
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 18/47] spapr: move the IRQ server number mapping under the machine |
Date: |
Mon, 24 Apr 2017 11:58:58 +1000 |
From: Cédric Le Goater <address@hidden>
This is the second step to abstract the IRQ 'server' number of the
XICS layer. Now that the prereq cleanups have been done in the
previous patch, we can move down the 'cpu_dt_id' to 'cpu_index'
mapping in the sPAPR machine handler.
Signed-off-by: Cédric Le Goater <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/intc/xics_spapr.c | 5 ++---
hw/ppc/spapr.c | 3 ++-
hw/ppc/spapr_cpu_core.c | 2 +-
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c
index 58f100d..f05308b8 100644
--- a/hw/intc/xics_spapr.c
+++ b/hw/intc/xics_spapr.c
@@ -52,9 +52,8 @@ static target_ulong h_cppr(PowerPCCPU *cpu, sPAPRMachineState
*spapr,
static target_ulong h_ipi(PowerPCCPU *cpu, sPAPRMachineState *spapr,
target_ulong opcode, target_ulong *args)
{
- target_ulong server = xics_get_cpu_index_by_dt_id(args[0]);
target_ulong mfrr = args[1];
- ICPState *icp = xics_icp_get(XICS_FABRIC(spapr), server);
+ ICPState *icp = xics_icp_get(XICS_FABRIC(spapr), args[0]);
if (!icp) {
return H_PARAMETER;
@@ -122,7 +121,7 @@ static void rtas_set_xive(PowerPCCPU *cpu,
sPAPRMachineState *spapr,
}
nr = rtas_ld(args, 0);
- server = xics_get_cpu_index_by_dt_id(rtas_ld(args, 1));
+ server = rtas_ld(args, 1);
priority = rtas_ld(args, 2);
if (!ics_valid_irq(ics, nr) || !xics_icp_get(XICS_FABRIC(spapr), server)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 8749f1b..08f8615 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -3112,9 +3112,10 @@ static void spapr_ics_resend(XICSFabric *dev)
ics_resend(spapr->ics);
}
-static ICPState *spapr_icp_get(XICSFabric *xi, int server)
+static ICPState *spapr_icp_get(XICSFabric *xi, int cpu_dt_id)
{
sPAPRMachineState *spapr = SPAPR_MACHINE(xi);
+ int server = xics_get_cpu_index_by_dt_id(cpu_dt_id);
return (server < spapr->nr_servers) ? &spapr->icps[server] : NULL;
}
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index 7db61bd..4e1a995 100644
--- a/hw/ppc/spapr_cpu_core.c
+++ b/hw/ppc/spapr_cpu_core.c
@@ -64,7 +64,7 @@ static void spapr_cpu_init(sPAPRMachineState *spapr,
PowerPCCPU *cpu,
{
CPUPPCState *env = &cpu->env;
XICSFabric *xi = XICS_FABRIC(spapr);
- ICPState *icp = xics_icp_get(xi, CPU(cpu)->cpu_index);
+ ICPState *icp = xics_icp_get(xi, cpu->cpu_dt_id);
/* Set time-base frequency to 512 MHz */
cpu_ppc_tb_init(env, SPAPR_TIMEBASE_FREQ);
--
2.9.3
- [Qemu-ppc] [PULL 14/47] spapr_pci: Warn when RAM page size is not enabled in IOMMU page mask, (continued)
- [Qemu-ppc] [PULL 14/47] spapr_pci: Warn when RAM page size is not enabled in IOMMU page mask, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 08/47] target/ppc: Add new H-CALL shells for in memory table translation, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 04/47] hw/ppc/pnv: Classify the "PowerNV Chip" devices as CPU devices, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 10/47] spapr: move spapr_populate_pa_features(), David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 07/47] target-ppc: support KVM_CAP_PPC_MMU_RADIX, KVM_CAP_PPC_MMU_HASH_V3, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 15/47] spapr_pci: Removed unused include, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 09/47] target/ppc: Implement H_REGISTER_PROCESS_TABLE H_CALL, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 16/47] target/ppc: Add ibm, processor-radix-AP-encodings for TCG, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 23/47] ppc/pnv: extend the machine with a InterruptStatsProvider interface, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 13/47] target-ppc/kvm: Enable in-kernel TCE acceleration for multi-tce, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 18/47] spapr: move the IRQ server number mapping under the machine,
David Gibson <=
- [Qemu-ppc] [PULL 24/47] ppc/pnv: create the ICP object under PnvCore, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 29/47] ppc: add IPMI support, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 11/47] spapr: Enable ISA 3.0 MMU mode selection via CAS, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 12/47] spapr: Workaround for broken radix guests, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 20/47] ppc/xics: add a realize() handler to ICPStateClass, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 28/47] ppc/pnv: Add OCC model stub with interrupt support, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 40/47] ppc/pnv: populate device tree for serial devices, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 21/47] ppc/pnv: add a PnvICPState object, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 42/47] ppc/pnv: add initial IPMI sensors for the BMC simulator, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 33/47] ipmi: introduce an ipmi_bmc_gen_event() API, David Gibson, 2017/04/23