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[Qemu-ppc] [PULL 14/47] spapr_pci: Warn when RAM page size is not enable
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 14/47] spapr_pci: Warn when RAM page size is not enabled in IOMMU page mask |
Date: |
Mon, 24 Apr 2017 11:58:54 +1000 |
From: Alexey Kardashevskiy <address@hidden>
If a page size used by QEMU is not enabled in the PHB IOMMU page mask,
in-kernel acceleration of TCE handling won't be enabled and performance
might be slower than expected.
This prints a warning if system page size is not enabled. This should
print a warning if huge pages are enabled but sphb.pgsz still uses
the default value of 4K|64K.
Signed-off-by: Alexey Kardashevskiy <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/spapr_pci.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index 98c52e4..097ebdd 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -1771,6 +1771,12 @@ static void spapr_phb_realize(DeviceState *dev, Error
**errp)
}
/* DMA setup */
+ if ((sphb->page_size_mask & qemu_getrampagesize()) == 0) {
+ error_report("System page size 0x%lx is not enabled in page_size_mask "
+ "(0x%"PRIx64"). Performance may be slow",
+ qemu_getrampagesize(), sphb->page_size_mask);
+ }
+
for (i = 0; i < windows_supported; ++i) {
tcet = spapr_tce_new_table(DEVICE(sphb), sphb->dma_liobn[i]);
if (!tcet) {
--
2.9.3
- [Qemu-ppc] [PULL 00/47] ppc-for-2.10 queue 20170424, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 02/47] pseries: Add pseries-2.10 machine type, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 01/47] target/ppc: Improve accuracy of guest HTM availability on P8s, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 03/47] ppc/spapr: QOM'ify sPAPRRTCState, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 06/47] spapr: Add ibm, processor-radix-AP-encodings to the device tree, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 05/47] target-ppc: kvm: make use of KVM_CREATE_SPAPR_TCE_64, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 14/47] spapr_pci: Warn when RAM page size is not enabled in IOMMU page mask,
David Gibson <=
- [Qemu-ppc] [PULL 08/47] target/ppc: Add new H-CALL shells for in memory table translation, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 04/47] hw/ppc/pnv: Classify the "PowerNV Chip" devices as CPU devices, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 10/47] spapr: move spapr_populate_pa_features(), David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 07/47] target-ppc: support KVM_CAP_PPC_MMU_RADIX, KVM_CAP_PPC_MMU_HASH_V3, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 15/47] spapr_pci: Removed unused include, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 09/47] target/ppc: Implement H_REGISTER_PROCESS_TABLE H_CALL, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 16/47] target/ppc: Add ibm, processor-radix-AP-encodings for TCG, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 23/47] ppc/pnv: extend the machine with a InterruptStatsProvider interface, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 13/47] target-ppc/kvm: Enable in-kernel TCE acceleration for multi-tce, David Gibson, 2017/04/23
- [Qemu-ppc] [PULL 18/47] spapr: move the IRQ server number mapping under the machine, David Gibson, 2017/04/23