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[Qemu-ppc] [PULL 16/67] pseries: Make cpu_update during CAS unconditiona
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 16/67] pseries: Make cpu_update during CAS unconditional |
Date: |
Thu, 12 Jan 2017 13:02:36 +1100 |
spapr_h_cas_compose_response() includes a cpu_update parameter which
controls whether it includes updated information on the CPUs in the device
tree fragment returned from the ibm,client-architecture-support (CAS) call.
Providing the updated information is essential when CAS has negotiated
compatibility options which require different cpu information to be
presented to the guest. However, it should be safe to provide in other
cases (it will just override the existing data in the device tree with
identical data). This simplifies the code by removing the parameter and
always providing the cpu update information.
Signed-off-by: David Gibson <address@hidden>
Reviewed-by: Alexey Kardashevskiy <address@hidden>
---
hw/ppc/spapr.c | 5 +----
hw/ppc/spapr_hcall.c | 8 ++------
include/hw/ppc/spapr.h | 1 -
3 files changed, 3 insertions(+), 11 deletions(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 4869fce..52970db 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -685,7 +685,6 @@ out:
int spapr_h_cas_compose_response(sPAPRMachineState *spapr,
target_ulong addr, target_ulong size,
- bool cpu_update,
sPAPROptionVector *ov5_updates)
{
void *fdt, *fdt_skel;
@@ -704,9 +703,7 @@ int spapr_h_cas_compose_response(sPAPRMachineState *spapr,
g_free(fdt_skel);
/* Fixup cpu nodes */
- if (cpu_update) {
- _FDT((spapr_fixup_cpu_dt(fdt, spapr)));
- }
+ _FDT((spapr_fixup_cpu_dt(fdt, spapr)));
if (spapr_dt_cas_updates(spapr, fdt, ov5_updates)) {
return -1;
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 9a9bedf..3f08b8a 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -945,7 +945,7 @@ static target_ulong
h_client_architecture_support(PowerPCCPU *cpu_,
target_ulong ov_table;
PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu_);
CPUState *cs;
- bool cpu_match = false, cpu_update = true;
+ bool cpu_match = false;
unsigned old_cpu_version = cpu_->cpu_version;
unsigned compat_lvl = 0, cpu_version = 0;
unsigned max_lvl = get_compat_level(cpu_->max_compat);
@@ -999,10 +999,6 @@ static target_ulong
h_client_architecture_support(PowerPCCPU *cpu_,
}
}
- if (!cpu_version) {
- cpu_update = false;
- }
-
/* For the future use: here @ov_table points to the first option vector */
ov_table = list;
@@ -1028,7 +1024,7 @@ static target_ulong
h_client_architecture_support(PowerPCCPU *cpu_,
if (!spapr->cas_reboot) {
spapr->cas_reboot =
- (spapr_h_cas_compose_response(spapr, args[1], args[2], cpu_update,
+ (spapr_h_cas_compose_response(spapr, args[1], args[2],
ov5_updates) != 0);
}
spapr_ovec_cleanup(ov5_updates);
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index f8d444d..04d2821 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -589,7 +589,6 @@ void spapr_events_init(sPAPRMachineState *sm);
void spapr_dt_events(sPAPRMachineState *sm, void *fdt);
int spapr_h_cas_compose_response(sPAPRMachineState *sm,
target_ulong addr, target_ulong size,
- bool cpu_update,
sPAPROptionVector *ov5_updates);
sPAPRTCETable *spapr_tce_new_table(DeviceState *owner, uint32_t liobn);
void spapr_tce_table_enable(sPAPRTCETable *tcet,
--
2.9.3
- [Qemu-ppc] [PULL 06/67] target-ppc: Add xscmpoqp and xscmpuqp instructions, (continued)
- [Qemu-ppc] [PULL 06/67] target-ppc: Add xscmpoqp and xscmpuqp instructions, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 05/67] target-ppc: Add xscmpexp[dp, qp] instructions, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 02/67] target-ppc: Consolidate instruction decode helpers, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 15/67] pseries: Always use core objects for CPU construction, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 10/67] target-ppc: Implement bcdcfsq. instruction, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 23/67] target-ppc: Implement bcd_is_valid function, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 25/67] target-ppc: implement xscpsgnqp instruction, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 11/67] target-ppc: Implement bcdctsq. instruction, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 33/67] pseries: Add pseries-2.9 machine type, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 12/67] target-ppc: Implement bcdcpsgn. instruction, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 16/67] pseries: Make cpu_update during CAS unconditional,
David Gibson <=
- [Qemu-ppc] [PULL 21/67] target-ppc: implement stop instruction, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 22/67] target-ppc: implement xsabsqp/xsnabsqp instruction, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 14/67] target-ppc: add vextu[bhw][lr]x instructions, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 38/67] qtest: add display-vga-test to ppc64, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 35/67] ppc: Rewrite ppc_get_compat_smt_threads(), David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 36/67] ppc: Validate compatibility modes when setting, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 47/67] target-ppc: Add xxinsertw instruction, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 60/67] pxb: Restrict to x86, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 18/67] ppc: Rename cpu_version to compat_pvr, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 20/67] target-ppc: move ppc_vsr_t to common header, David Gibson, 2017/01/11