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[Qemu-ppc] [PULL 23/67] target-ppc: Implement bcd_is_valid function
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 23/67] target-ppc: Implement bcd_is_valid function |
Date: |
Thu, 12 Jan 2017 13:02:43 +1100 |
From: Jose Ricardo Ziviani <address@hidden>
A function to check if all digits of a given BCD number is valid is
here presented because more instructions will need to reuse the
same code.
Signed-off-by: Jose Ricardo Ziviani <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target/ppc/int_helper.c | 27 ++++++++++++++++++++-------
1 file changed, 20 insertions(+), 7 deletions(-)
diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index 34dfe02..2bb628f 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -2596,6 +2596,24 @@ static void bcd_put_digit(ppc_avr_t *bcd, uint8_t digit,
int n)
}
}
+static bool bcd_is_valid(ppc_avr_t *bcd)
+{
+ int i;
+ int invalid = 0;
+
+ if (bcd_get_sgn(bcd) == 0) {
+ return false;
+ }
+
+ for (i = 1; i < 32; i++) {
+ bcd_get_digit(bcd, i, &invalid);
+ if (unlikely(invalid)) {
+ return false;
+ }
+ }
+ return true;
+}
+
static int bcd_cmp_zero(ppc_avr_t *bcd)
{
if (bcd->u64[HI_IDX] == 0 && (bcd->u64[LO_IDX] >> 4) == 0) {
@@ -3013,18 +3031,13 @@ uint32_t helper_bcdcpsgn(ppc_avr_t *r, ppc_avr_t *a,
ppc_avr_t *b, uint32_t ps)
uint32_t helper_bcdsetsgn(ppc_avr_t *r, ppc_avr_t *b, uint32_t ps)
{
- int i;
- int invalid = 0;
int sgnb = bcd_get_sgn(b);
*r = *b;
bcd_put_digit(r, bcd_preferred_sgn(sgnb, ps), 0);
- for (i = 1; i < 32; i++) {
- bcd_get_digit(b, i, &invalid);
- if (unlikely(invalid)) {
- return CRF_SO;
- }
+ if (bcd_is_valid(b) == false) {
+ return CRF_SO;
}
return bcd_cmp_zero(r);
--
2.9.3
- [Qemu-ppc] [PULL 07/67] target-ppc: implement lxsd and lxssp instructions, (continued)
- [Qemu-ppc] [PULL 07/67] target-ppc: implement lxsd and lxssp instructions, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 09/67] target-ppc: implement lxv/lxvx and stxv/stxvx, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 24/67] target-ppc: implement xsnegqp instruction, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 13/67] target-ppc: Implement bcdsetsgn. instruction, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 03/67] target-ppc: rename CRF_* defines as CRF_*_BIT, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 06/67] target-ppc: Add xscmpoqp and xscmpuqp instructions, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 05/67] target-ppc: Add xscmpexp[dp, qp] instructions, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 02/67] target-ppc: Consolidate instruction decode helpers, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 15/67] pseries: Always use core objects for CPU construction, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 10/67] target-ppc: Implement bcdcfsq. instruction, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 23/67] target-ppc: Implement bcd_is_valid function,
David Gibson <=
- [Qemu-ppc] [PULL 25/67] target-ppc: implement xscpsgnqp instruction, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 11/67] target-ppc: Implement bcdctsq. instruction, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 33/67] pseries: Add pseries-2.9 machine type, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 12/67] target-ppc: Implement bcdcpsgn. instruction, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 16/67] pseries: Make cpu_update during CAS unconditional, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 21/67] target-ppc: implement stop instruction, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 22/67] target-ppc: implement xsabsqp/xsnabsqp instruction, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 14/67] target-ppc: add vextu[bhw][lr]x instructions, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 38/67] qtest: add display-vga-test to ppc64, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 35/67] ppc: Rewrite ppc_get_compat_smt_threads(), David Gibson, 2017/01/11