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Re: [Qemu-ppc] [Qemu-devel] [PULL 00/19] ppc-for-2.8 queue 20161115


From: Stefan Hajnoczi
Subject: Re: [Qemu-ppc] [Qemu-devel] [PULL 00/19] ppc-for-2.8 queue 20161115
Date: Tue, 15 Nov 2016 11:18:02 +0000
User-agent: Mutt/1.7.1 (2016-10-04)

On Tue, Nov 15, 2016 at 01:48:45PM +1100, David Gibson wrote:
> The following changes since commit 682df581c65ed2c1b9e77093e332214ecaa1ee93:
> 
>   Merge remote-tracking branch 'jsnow/tags/ide-pull-request' into staging 
> (2016-11-14 17:07:16 +0000)
> 
> are available in the git repository at:
> 
>   git://github.com/dgibson/qemu.git tags/ppc-for-2.8-20161115
> 
> for you to fetch changes up to 859c397e57a4c0f8be2e2be011892b7d81b72e8c:
> 
>   boot-serial-test: Add a test for the powernv machine (2016-11-15 11:45:01 
> +1100)
> 
> ----------------------------------------------------------------
> ppc patch queue 2016-11-15
> 
> Latest set of ppc and spapr related patches.  Highlights are:
>    * More POWER9 instructions
>    * Fix some subtle outstanding bugs
>    * Add some extra tests
> 
> One patch affects bitops.h, so isn't strictly ppc related.
> 
> ----------------------------------------------------------------
> Ankit Kumar (1):
>       target-ppc: add vprtyb[w/d/q] instructions
> 
> Balbir Singh (1):
>       FU exceptions should carry a cause (IC)
> 
> Bharata B Rao (1):
>       target-ppc: add vrldnm and vrlwnm instructions
> 
> C├ędric Le Goater (3):
>       ppc/pnv: fix compile breakage on old gcc
>       ppc/pnv: add a 'xscom_core_base' field to PnvChipClass
>       ppc/pnv: fix xscom address translation for POWER9
> 
> David Gibson (5):
>       powernv: CPU compatibility modes don't make sense for powernv
>       ppc: Remove some stub POWER6 models
>       spapr: Fix migration of PCI host bridges from qemu-2.7
>       ppc/pnv: Fix fatal bug on 32-bit hosts
>       tests: add XSCOM tests for the PowerNV machine
> 
> Gautham R. Shenoy (1):
>       target-ppc: add vrldnmi and vrlwmi instructions
> 
> Jose Ricardo Ziviani (4):
>       target-ppc: Implement bcdcfn. instruction
>       target-ppc: Implement bcdctn. instruction
>       target-ppc: Implement bcdcfz. instruction
>       target-ppc: Implement bcdctz. instruction
> 
> Nikunj A Dadhania (1):
>       bitops: fix rol/ror when shift is zero
> 
> Thomas Huth (2):
>       spapr-vty: Fix bad assert() statement
>       boot-serial-test: Add a test for the powernv machine
> 
>  disas/ppc.c                         |   4 +
>  hw/char/spapr_vty.c                 |  11 +-
>  hw/ppc/pnv.c                        |  16 ++-
>  hw/ppc/pnv_core.c                   |   1 +
>  hw/ppc/pnv_lpc.c                    |   3 +-
>  hw/ppc/pnv_xscom.c                  |  10 +-
>  hw/ppc/spapr_pci.c                  |  18 ++-
>  include/hw/ppc/pnv.h                |   2 +-
>  include/hw/ppc/pnv_xscom.h          |   7 +-
>  include/qemu/bitops.h               |  16 +--
>  target-ppc/cpu-models.c             |   4 -
>  target-ppc/cpu-models.h             |   2 -
>  target-ppc/excp_helper.c            |   3 +
>  target-ppc/helper.h                 |  11 ++
>  target-ppc/int_helper.c             | 249 
> ++++++++++++++++++++++++++++++++++++
>  target-ppc/internal.h               |  50 ++++++++
>  target-ppc/translate.c              |  29 +----
>  target-ppc/translate/vmx-impl.inc.c |  88 +++++++++++++
>  target-ppc/translate/vmx-ops.inc.c  |  16 ++-
>  tests/Makefile.include              |   2 +
>  tests/boot-serial-test.c            |   1 +
>  tests/pnv-xscom-test.c              | 140 ++++++++++++++++++++
>  22 files changed, 609 insertions(+), 74 deletions(-)
>  create mode 100644 target-ppc/internal.h
>  create mode 100644 tests/pnv-xscom-test.c
> 

Thanks, applied to my staging tree:
https://github.com/stefanha/qemu/commits/staging

Stefan

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